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author | Codrin Ciubotariu <codrin.ciubotariu@microchip.com> | 2022-03-04 20:26:16 +0200 |
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committer | Nicolas Ferre <nicolas.ferre@microchip.com> | 2022-03-08 15:35:35 +0100 |
commit | 1a944729d8635fa59638f24e8727d5ccaa0c8c19 (patch) | |
tree | 69000ad631b27030be93d0e1eaccfa733f6d6a81 /drivers/nvmem/mxs-ocotp.c | |
parent | a5ab04af49434aef532bf6cd4baa08a13665d608 (diff) |
clk: at91: sama7g5: fix parents of PDMCs' GCLK
Audio PLL can be used as parent by the GCLKs of PDMCs.
Fixes: cb783bbbcf54 ("clk: at91: sama7g5: add clock support for sama7g5")
Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20220304182616.1920392-1-codrin.ciubotariu@microchip.com
Diffstat (limited to 'drivers/nvmem/mxs-ocotp.c')
0 files changed, 0 insertions, 0 deletions