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authorDavid S. Miller <davem@davemloft.net>2016-11-13 00:56:28 -0500
committerDavid S. Miller <davem@davemloft.net>2016-11-13 00:56:28 -0500
commit849dcce3fee7f2a68b2c82141e2f3b919bce3c79 (patch)
treed3a0d6adaa0cc72c1fc568721df940b032f2551d /drivers/net/phy/marvell.c
parentf0a404001204a23f94e1ca0cda8597ce80714f5e (diff)
parentd7445d1f0506fe26a877fac8dcdff7f4eff1328e (diff)
Merge branch 'amd-xgbe-updates'
Tom Lendacky says: ==================== amd-xgbe: AMD XGBE driver updates 2016-11-10 This patch series is targeted at adding support for a new PCI version of the hardware. As part of the new PCI device, there is a new PCS/PHY interaction, ECC support, I2C sideband communication, SFP+ support and more. The following updates and fixes are included in this driver update series: - Hardware workaround for possible incorrectly generated interrupts during software reset - Hardware workaround for Tx timestamp register access order - Add support for a PCI version of the device - Increase the Rx queue limit to take advantage of the increased number of DMA channels that might be available - Add support for a new DMA channel interrupt mode - Add ECC support for the device memory - Add support for using the integrated I2C controller for sideband communication - Expose the phylib phy_aneg_done() function so it can be called by the driver - Add support for SFP+ modules - Add support for MDIO attached PHYs - Add support for KR re-driver between the PCS/SerDes and an external PHY This patch series is based on net-next. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
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