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authorIvan Djelic <ivan.djelic@parrot.com>2012-04-30 12:17:18 +0200
committerDavid Woodhouse <David.Woodhouse@intel.com>2012-05-13 23:25:51 -0500
commit0e618ef0a6a33cf7ef96c2c824402088dd8ef48c (patch)
tree308d1554fe7139f6df1577a7387703cde7cf342a /drivers/mtd/nand/Kconfig
parent8d602cf50d3bba864bc1438f486b626df69c87b3 (diff)
mtd: nand: omap: add support for hardware BCH ecc
Two modes are supported: 4-bit and 8-bit error correction. Note that 4-bit mode is only confirmed to work on OMAP3630 ES 1.x, x >= 1. The OMAP3 GPMC hardware BCH engine computes remainder polynomials, it does not provide automatic error location and correction: this step is implemented using the BCH library. This implementation only protects page data, there is no support for protecting user-defined spare area bytes (this could be added with few modifications); therefore, it cannot be used with YAFFS2 or other similar filesystems that depend on oob storage. Before being stored to nand flash, hardware BCH ecc is adjusted so that an erased page has a valid ecc; thus allowing correction of bitflips in blank pages (also common on 4-bit devices). BCH correction mode is selected at runtime by setting platform data parameter 'ecc_opt' to value OMAP_ECC_BCH4_CODE_HW or OMAP_ECC_BCH8_CODE_HW. This code has been tested with mtd test modules, UBI and UBIFS on a BeagleBoard revC3 (OMAP3530 ES3.0 + Micron NAND 256MiB 1,8V 16-bit). Signed-off-by: Ivan Djelic <ivan.djelic@parrot.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Diffstat (limited to 'drivers/mtd/nand/Kconfig')
-rw-r--r--drivers/mtd/nand/Kconfig40
1 files changed, 40 insertions, 0 deletions
diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index bf0a28d513d4..31bb7e5b504a 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -115,6 +115,46 @@ config MTD_NAND_OMAP2
Support for NAND flash on Texas Instruments OMAP2, OMAP3 and OMAP4
platforms.
+config MTD_NAND_OMAP_BCH
+ depends on MTD_NAND && MTD_NAND_OMAP2 && ARCH_OMAP3
+ bool "Enable support for hardware BCH error correction"
+ default n
+ select BCH
+ select BCH_CONST_PARAMS
+ help
+ Support for hardware BCH error correction.
+
+choice
+ prompt "BCH error correction capability"
+ depends on MTD_NAND_OMAP_BCH
+
+config MTD_NAND_OMAP_BCH8
+ bool "8 bits / 512 bytes (recommended)"
+ help
+ Support correcting up to 8 bitflips per 512-byte block.
+ This will use 13 bytes of spare area per 512 bytes of page data.
+ This is the recommended mode, as 4-bit mode does not work
+ on some OMAP3 revisions, due to a hardware bug.
+
+config MTD_NAND_OMAP_BCH4
+ bool "4 bits / 512 bytes"
+ help
+ Support correcting up to 4 bitflips per 512-byte block.
+ This will use 7 bytes of spare area per 512 bytes of page data.
+ Note that this mode does not work on some OMAP3 revisions, due to a
+ hardware bug. Please check your OMAP datasheet before selecting this
+ mode.
+
+endchoice
+
+if MTD_NAND_OMAP_BCH
+config BCH_CONST_M
+ default 13
+config BCH_CONST_T
+ default 4 if MTD_NAND_OMAP_BCH4
+ default 8 if MTD_NAND_OMAP_BCH8
+endif
+
config MTD_NAND_IDS
tristate