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authorLinus Torvalds <torvalds@linux-foundation.org>2022-08-06 15:04:48 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2022-08-06 15:04:48 -0700
commit4d1044fcb996e8de9b9ab392f4a767890e45202d (patch)
tree313e247b709dbfd375c73f390e8698f1154bc6f5 /drivers/irqchip
parentea0c39260d0c1d8e11d89c9d42ca48e172d1c868 (diff)
parentba6cfef057e1c594c456627aad81c2343fdb5d13 (diff)
Merge tag 'riscv-for-linus-5.20-mw0' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux
Pull RISC-V updates from Palmer Dabbelt: - Enabling the FPU is now a static_key - Improvements to the Svpbmt support - CPU topology bindings for a handful of systems - Support for systems with 64-bit hart IDs - Many settings have been enabled in the defconfig, including both support for the StarFive systems and many of the Docker requirements There are also a handful of cleanups and improvements, as usual. * tag 'riscv-for-linus-5.20-mw0' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: (28 commits) riscv: enable Docker requirements in defconfig riscv: convert the t-head pbmt errata to use the __nops macro riscv: introduce nops and __nops macros for NOP sequences RISC-V: Add fast call path of crash_kexec() riscv: mmap with PROT_WRITE but no PROT_READ is invalid riscv/efi_stub: Add 64bit boot-hartid support on RV64 riscv: cpu: Add 64bit hartid support on RV64 riscv: smp: Add 64bit hartid support on RV64 riscv: spinwait: Fix hartid variable type riscv: cpu_ops_sbi: Add 64bit hartid support on RV64 riscv: dts: sifive: "fix" pmic watchdog node name riscv: dts: canaan: Add k210 topology information riscv: dts: sifive: Add fu740 topology information riscv: dts: sifive: Add fu540 topology information riscv: dts: starfive: Add JH7100 CPU topology RISC-V: Add CONFIG_{NON,}PORTABLE riscv: config: enable SOC_STARFIVE in defconfig riscv: dts: microchip: Add mpfs' topology information riscv: Kconfig.socs: Add comments riscv: Kconfig.erratas: Add comments ...
Diffstat (limited to 'drivers/irqchip')
-rw-r--r--drivers/irqchip/irq-riscv-intc.c7
-rw-r--r--drivers/irqchip/irq-sifive-plic.c7
2 files changed, 8 insertions, 6 deletions
diff --git a/drivers/irqchip/irq-riscv-intc.c b/drivers/irqchip/irq-riscv-intc.c
index b65bd8878d4f..499e5f81b3fe 100644
--- a/drivers/irqchip/irq-riscv-intc.c
+++ b/drivers/irqchip/irq-riscv-intc.c
@@ -95,10 +95,11 @@ static const struct irq_domain_ops riscv_intc_domain_ops = {
static int __init riscv_intc_init(struct device_node *node,
struct device_node *parent)
{
- int rc, hartid;
+ int rc;
+ unsigned long hartid;
- hartid = riscv_of_parent_hartid(node);
- if (hartid < 0) {
+ rc = riscv_of_parent_hartid(node, &hartid);
+ if (rc < 0) {
pr_warn("unable to find hart id for %pOF\n", node);
return 0;
}
diff --git a/drivers/irqchip/irq-sifive-plic.c b/drivers/irqchip/irq-sifive-plic.c
index ba4938188570..2f4784860df5 100644
--- a/drivers/irqchip/irq-sifive-plic.c
+++ b/drivers/irqchip/irq-sifive-plic.c
@@ -374,7 +374,8 @@ static int __init __plic_init(struct device_node *node,
for (i = 0; i < nr_contexts; i++) {
struct of_phandle_args parent;
irq_hw_number_t hwirq;
- int cpu, hartid;
+ int cpu;
+ unsigned long hartid;
if (of_irq_parse_one(node, i, &parent)) {
pr_err("failed to parse parent for context %d.\n", i);
@@ -398,8 +399,8 @@ static int __init __plic_init(struct device_node *node,
continue;
}
- hartid = riscv_of_parent_hartid(parent.np);
- if (hartid < 0) {
+ error = riscv_of_parent_hartid(parent.np, &hartid);
+ if (error < 0) {
pr_warn("failed to parse hart ID for context %d.\n", i);
continue;
}