diff options
| author | Michel Dänzer <daenzer@vmware.com> | 2009-06-16 17:29:06 +0200 |
|---|---|---|
| committer | Dave Airlie <airlied@redhat.com> | 2009-06-19 09:28:20 +1000 |
| commit | 4e484e7dc5856ff5086b6329d82e36d4adaf1f02 (patch) | |
| tree | ca8d91c03f89732c36f44b30d01927802f4fa767 /drivers/gpu/drm/radeon/radeon_reg.h | |
| parent | 62369028c7e2039b821799b3db52f0d622f0e8b5 (diff) | |
radeon: Fix CP byte order on big endian architectures with KMS.
Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/radeon_reg.h')
| -rw-r--r-- | drivers/gpu/drm/radeon/radeon_reg.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_reg.h b/drivers/gpu/drm/radeon/radeon_reg.h index 6d3d90406a24..e1b618574461 100644 --- a/drivers/gpu/drm/radeon/radeon_reg.h +++ b/drivers/gpu/drm/radeon/radeon_reg.h @@ -3184,6 +3184,7 @@ # define RADEON_RB_BUFSZ_MASK (0x3f << 0) # define RADEON_RB_BLKSZ_SHIFT 8 # define RADEON_RB_BLKSZ_MASK (0x3f << 8) +# define RADEON_BUF_SWAP_32BIT (1 << 17) # define RADEON_MAX_FETCH_SHIFT 18 # define RADEON_MAX_FETCH_MASK (0x3 << 18) # define RADEON_RB_NO_UPDATE (1 << 27) |