diff options
| author | Stephen Boyd <sboyd@codeaurora.org> | 2015-01-29 15:38:12 -0800 |
|---|---|---|
| committer | Michael Turquette <mturquette@linaro.org> | 2015-02-25 12:08:39 -0800 |
| commit | 84b919fdb8559a8cd5432d8fa0002219df59cb32 (patch) | |
| tree | 807e1a1081c4bc56544cbf7dfc6fe4a3e3c6db9b /drivers/clk | |
| parent | 7dd47b8ef54c301ecde58cecf2f3e29ff3f48d4a (diff) | |
clk: qcom: lcc-msm8960: Fix PLL rate detection
regmap_read() returns 0 on success, not the value of the register
that is read. Fix it so we properly detect the frequency plan.
Fixes: b82875ee07e5 "clk: qcom: Add MSM8960/APQ8064 LPASS clock
controller (LCC) driver"
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
Diffstat (limited to 'drivers/clk')
| -rw-r--r-- | drivers/clk/qcom/lcc-msm8960.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/qcom/lcc-msm8960.c b/drivers/clk/qcom/lcc-msm8960.c index 705e4d5bb6c7..3ecade0de9d2 100644 --- a/drivers/clk/qcom/lcc-msm8960.c +++ b/drivers/clk/qcom/lcc-msm8960.c @@ -547,7 +547,7 @@ static int lcc_msm8960_probe(struct platform_device *pdev) return PTR_ERR(regmap); /* Use the correct frequency plan depending on speed of PLL4 */ - val = regmap_read(regmap, 0x4, &val); + regmap_read(regmap, 0x4, &val); if (val == 0x12) { slimbus_src.freq_tbl = clk_tbl_aif_osr_492; mi2s_osr_src.freq_tbl = clk_tbl_aif_osr_492; |