diff options
| author | Peter De Schrijver <pdeschrijver@nvidia.com> | 2017-07-25 13:34:04 +0300 |
|---|---|---|
| committer | Stephen Boyd <sboyd@codeaurora.org> | 2017-08-23 15:58:56 -0700 |
| commit | 030999fe514d2d6dbabf0ed6727f4c493082d99d (patch) | |
| tree | c240ba3e3f5e96792641f032b8e313fd56ac55ed /drivers/clk | |
| parent | 04434cfa2b2032eae52c197ea184844dd76a329d (diff) | |
clk: tegra: disable SSC for PLL_D2
PLLD2 is used for HDMI which does not allow Spread Spectrum clocking.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Tested-by: Thierry Reding <treding@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'drivers/clk')
| -rw-r--r-- | drivers/clk/tegra/clk-tegra210.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/tegra/clk-tegra210.c b/drivers/clk/tegra/clk-tegra210.c index 1024e853ea65..facd6ee672dc 100644 --- a/drivers/clk/tegra/clk-tegra210.c +++ b/drivers/clk/tegra/clk-tegra210.c @@ -146,7 +146,7 @@ #define PLLD_SDM_EN_MASK BIT(16) #define PLLD2_SDM_EN_MASK BIT(31) -#define PLLD2_SSC_EN_MASK BIT(30) +#define PLLD2_SSC_EN_MASK 0 #define PLLDP_SS_CFG 0x598 #define PLLDP_SDM_EN_MASK BIT(31) |