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authorElaine Zhang <zhangqing@rock-chips.com>2021-05-11 17:07:26 +0800
committerHeiko Stuebner <heiko@sntech.de>2021-05-11 12:22:29 +0200
commit23029150a05b59ebacca6dd76f6c14dc67a95877 (patch)
treec05f52c3c47c6ab6821b3c7a3c1f656853dc7287 /drivers/clk/rockchip
parent6efb943b8616ec53a5e444193dccf1af9ad627b5 (diff)
clk: rockchip: Optimize PLL table memory usage
Before the change: The sizeof rk3568_pll_rates = 2544 Use union: The sizeof rk3568_pll_rates = 1696 In future Soc, more PLL types will be added, and the rockchip_pll_rate_table will add more members, and the space savings will be even more pronounced by using union. Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Link: https://lore.kernel.org/r/20210511090726.15146-1-zhangqing@rock-chips.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'drivers/clk/rockchip')
-rw-r--r--drivers/clk/rockchip/clk.h29
1 files changed, 18 insertions, 11 deletions
diff --git a/drivers/clk/rockchip/clk.h b/drivers/clk/rockchip/clk.h
index 571cee7bbfdc..7aa45cc70287 100644
--- a/drivers/clk/rockchip/clk.h
+++ b/drivers/clk/rockchip/clk.h
@@ -271,17 +271,24 @@ struct rockchip_clk_provider {
struct rockchip_pll_rate_table {
unsigned long rate;
- unsigned int nr;
- unsigned int nf;
- unsigned int no;
- unsigned int nb;
- /* for RK3036/RK3399 */
- unsigned int fbdiv;
- unsigned int postdiv1;
- unsigned int refdiv;
- unsigned int postdiv2;
- unsigned int dsmpd;
- unsigned int frac;
+ union {
+ struct {
+ /* for RK3066 */
+ unsigned int nr;
+ unsigned int nf;
+ unsigned int no;
+ unsigned int nb;
+ };
+ struct {
+ /* for RK3036/RK3399 */
+ unsigned int fbdiv;
+ unsigned int postdiv1;
+ unsigned int refdiv;
+ unsigned int postdiv2;
+ unsigned int dsmpd;
+ unsigned int frac;
+ };
+ };
};
/**