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authorRafael J. Wysocki <rafael.j.wysocki@intel.com>2022-03-31 19:38:51 +0200
committerBjorn Helgaas <bhelgaas@google.com>2022-04-11 11:18:11 -0500
commit92597f97a40bf661bebceb92e26ff87c76d562d4 (patch)
treef4e99f7826a6c5be17408ad53af1f0d9e386947e /block/blk-lib.c
parent3123109284176b1532874591f7c81f3837bbdc17 (diff)
PCI/PM: Avoid putting Elo i2 PCIe Ports in D3cold
If a Root Port on Elo i2 is put into D3cold and then back into D0, the downstream device becomes permanently inaccessible, so add a bridge D3 DMI quirk for that system. This was exposed by 14858dcc3b35 ("PCI: Use pci_update_current_state() in pci_enable_device_flags()"), but before that commit the Root Port in question had never been put into D3cold for real due to a mismatch between its power state retrieved from the PCI_PM_CTRL register (which was accessible even though the platform firmware indicated that the port was in D3cold) and the state of an ACPI power resource involved in its power management. BugLink: https://bugzilla.kernel.org/show_bug.cgi?id=215715 Link: https://lore.kernel.org/r/11980172.O9o76ZdvQC@kreacher Reported-by: Stefan Gottwald <gottwald@igel.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Cc: stable@vger.kernel.org # v5.15+
Diffstat (limited to 'block/blk-lib.c')
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