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authorGavin Shan <shangw@linux.vnet.ibm.com>2013-06-20 13:21:07 +0800
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2013-06-20 17:06:24 +1000
commit73370c662b4e453185201b44b775a49e95870009 (patch)
tree45982f15797b889488e13094c6cc792cebd82e26 /arch
parent8747f36324bbe7f762bd9744d2dd20ebda021547 (diff)
powerpc/eeh: I/O chip post initialization
The post initialization (struct eeh_ops::post_init) is called after the EEH probe is done. On the other hand, the EEH core post initialization is designed to call platform and then I/O chip backend on PowerNV platform. The patch adds the backend for I/O chip to notify the platform that the specific PHB is ready to supply EEH service. Signed-off-by: Gavin Shan <shangw@linux.vnet.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch')
-rw-r--r--arch/powerpc/platforms/powernv/eeh-ioda.c21
1 files changed, 20 insertions, 1 deletions
diff --git a/arch/powerpc/platforms/powernv/eeh-ioda.c b/arch/powerpc/platforms/powernv/eeh-ioda.c
index f12e8887b144..7b272416b9cc 100644
--- a/arch/powerpc/platforms/powernv/eeh-ioda.c
+++ b/arch/powerpc/platforms/powernv/eeh-ioda.c
@@ -34,8 +34,27 @@
#include "powernv.h"
#include "pci.h"
+/**
+ * ioda_eeh_post_init - Chip dependent post initialization
+ * @hose: PCI controller
+ *
+ * The function will be called after eeh PEs and devices
+ * have been built. That means the EEH is ready to supply
+ * service with I/O cache.
+ */
+static int ioda_eeh_post_init(struct pci_controller *hose)
+{
+ struct pnv_phb *phb = hose->private_data;
+
+ /* FIXME: Enable it for PHB3 later */
+ if (phb->type == PNV_PHB_IODA1)
+ phb->eeh_enabled = 1;
+
+ return 0;
+}
+
struct pnv_eeh_ops ioda_eeh_ops = {
- .post_init = NULL,
+ .post_init = ioda_eeh_post_init,
.set_option = NULL,
.get_state = NULL,
.reset = NULL,