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authorDrew Fustini <dfustini@tenstorrent.com>2024-08-01 11:38:10 -0700
committerDrew Fustini <drew@pdp7.com>2024-08-08 09:19:46 -0700
commit2d98fea7491a00dccd61fee019843b262e60f819 (patch)
tree53aa92d98b60ecd3ffc1f1b052039788b09271e6 /arch/riscv
parent7f5b28218cec55072b562be386675ccae41acca1 (diff)
riscv: dts: thead: change TH1520 SPI node to use clock controller
Change the clock property in the TH1520 SPI controller node to a clock provided by AP_SYS clock controller. Remove spi_clk fixed clock reference from BeagleV Ahead and LPI4a dts. Link: https://git.beagleboard.org/beaglev-ahead/beaglev-ahead/-/tree/main/docs Signed-off-by: Drew Fustini <dfustini@tenstorrent.com>
Diffstat (limited to 'arch/riscv')
-rw-r--r--arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts4
-rw-r--r--arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi4
-rw-r--r--arch/riscv/boot/dts/thead/th1520.dtsi8
3 files changed, 1 insertions, 15 deletions
diff --git a/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts b/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts
index 425f07d73b32..497d961456f3 100644
--- a/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts
+++ b/arch/riscv/boot/dts/thead/th1520-beaglev-ahead.dts
@@ -45,10 +45,6 @@
clock-frequency = <32768>;
};
-&spi_clk {
- clock-frequency = <396000000>;
-};
-
&dmac0 {
status = "okay";
};
diff --git a/arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi b/arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi
index 077dbbe4abb6..78977bdbbe3d 100644
--- a/arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi
+++ b/arch/riscv/boot/dts/thead/th1520-lichee-module-4a.dtsi
@@ -25,10 +25,6 @@
clock-frequency = <32768>;
};
-&spi_clk {
- clock-frequency = <396000000>;
-};
-
&dmac0 {
status = "okay";
};
diff --git a/arch/riscv/boot/dts/thead/th1520.dtsi b/arch/riscv/boot/dts/thead/th1520.dtsi
index 5f4f94ca9cc7..6992060e6a54 100644
--- a/arch/riscv/boot/dts/thead/th1520.dtsi
+++ b/arch/riscv/boot/dts/thead/th1520.dtsi
@@ -216,12 +216,6 @@
#clock-cells = <0>;
};
- spi_clk: spi-clock {
- compatible = "fixed-clock";
- clock-output-names = "spi_clk";
- #clock-cells = <0>;
- };
-
soc {
compatible = "simple-bus";
interrupt-parent = <&plic>;
@@ -256,7 +250,7 @@
compatible = "thead,th1520-spi", "snps,dw-apb-ssi";
reg = <0xff 0xe700c000 0x0 0x1000>;
interrupts = <54 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&spi_clk>;
+ clocks = <&clk CLK_SPI>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";