Merge branch 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus

* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (62 commits)
  [MIPS] PNX8550: Cleanup proc code.
  [MIPS] WRPPMC: Fix build.
  [MIPS] Yosemite: Fix modpost warnings.
  [MIPS] Change names of local variables to silence sparse
  [MIPS] SB1: Fix modpost warning.
  [MIPS] PNX: Fix modpost warnings.
  [MIPS] Alchemy: Fix modpost warnings.
  [MIPS] Non-FPAFF: Fix warning.
  [MIPS] DEC: Fix modpost warning.
  [MIPS] MIPSsim: Enable MIPSsim virtual network driver.
  [MIPS] Delete Ocelot 3 support.
  [MIPS] remove LASAT Networks platforms support
  [MIPS] Early check for SMTC kernel on non-MT processor
  [MIPS] Add debugfs files to show fpuemu statistics
  [MIPS] Add some debugfs files to debug unaligned accesses
  [MIPS] rbtx4938: Fix secondary PCIC and glue internal NICs
  [MIPS] tc35815: Load MAC address via platform_device
  [MIPS] Move FPU affinity code into separate file.
  [MIPS] Make ioremap() work on TX39/49 special unmapped segment
  [MIPS] rbtx4938: Update and minimize defconfig
  ...

1 files changed, 0 insertions, 93 deletions

diff --git a/arch/mips/pci/ops-marvell.c b/arch/mips/pci/ops-marvell.c
deleted file mode 100644
index 1ac5c59199d1..000000000000
--- a/arch/mips/pci/ops-marvell.c
+++ /dev/null
@@ -1,93 +0,0 @@
-/*
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * Copyright (C) 2003, 2004 Ralf Baechle (ralf@linux-mips.org)
- */
-#include <linux/kernel.h>
-#include <linux/types.h>
-#include <linux/pci.h>
-
-#include <asm/marvell.h>
-
-static int mv_read_config(struct pci_bus *bus, unsigned int devfn,
-	int where, int size, u32 * val)
-{
-	struct mv_pci_controller *mvbc = bus->sysdata;
-	unsigned long address_reg, data_reg;
-	u32 address;
-
-	address_reg = mvbc->config_addr;
-	data_reg = mvbc->config_vreg;
-
-	/* Accessing device 31 crashes those Marvells.  Since years.
-	   Will they ever make sane controllers ... */
-	if (PCI_SLOT(devfn) == 31)
-		return PCIBIOS_DEVICE_NOT_FOUND;
-
-	address = (bus->number << 16) | (devfn << 8) |
-	          (where & 0xfc) | 0x80000000;
-
-	/* start the configuration cycle */
-	MV_WRITE(address_reg, address);
-
-	switch (size) {
-	case 1:
-		*val = MV_READ_8(data_reg + (where & 0x3));
-		break;
-
-	case 2:
-		*val = MV_READ_16(data_reg + (where & 0x3));
-		break;
-
-	case 4:
-		*val = MV_READ(data_reg);
-		break;
-	}
-
-	return PCIBIOS_SUCCESSFUL;
-}
-
-static int mv_write_config(struct pci_bus *bus, unsigned int devfn,
-	int where, int size, u32 val)
-{
-	struct mv_pci_controller *mvbc = bus->sysdata;
-	unsigned long address_reg, data_reg;
-	u32 address;
-
-	address_reg = mvbc->config_addr;
-	data_reg = mvbc->config_vreg;
-
-	/* Accessing device 31 crashes those Marvells.  Since years.
-	   Will they ever make sane controllers ... */
-	if (PCI_SLOT(devfn) == 31)
-		return PCIBIOS_DEVICE_NOT_FOUND;
-
-	address = (bus->number << 16) | (devfn << 8) |
-	          (where & 0xfc) | 0x80000000;
-
-	/* start the configuration cycle */
-	MV_WRITE(address_reg, address);
-
-	switch (size) {
-	case 1:
-		MV_WRITE_8(data_reg + (where & 0x3), val);
-		break;
-
-	case 2:
-		MV_WRITE_16(data_reg + (where & 0x3), val);
-		break;
-
-	case 4:
-		MV_WRITE(data_reg, val);
-		break;
-	}
-
-	return PCIBIOS_SUCCESSFUL;
-}
-
-struct pci_ops mv_pci_ops = {
-	.read	= mv_read_config,
-	.write	= mv_write_config
-};