diff options
author | 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com> | 2021-06-26 14:18:41 +0800 |
---|---|---|
committer | Thomas Bogendoerfer <tsbogend@alpha.franken.de> | 2021-06-30 14:37:16 +0200 |
commit | 34c522a07ccbfb0e6476713b41a09f9f51a06c9f (patch) | |
tree | da7ce4ccef04a00262795aaec9e71475ed5d7721 /arch/mips/boot | |
parent | 23c64447b3538a6f34cb38aae3bc19dc1ec53436 (diff) |
MIPS: CI20: Add second percpu timer for SMP.
1.Add a new TCU channel as the percpu timer of core1, this is to
prepare for the subsequent SMP support. The newly added channel
will not adversely affect the current single-core state.
2.Adjust the position of TCU node to make it consistent with the
order in jz4780.dtsi file.
Tested-by: Nikolaus Schaller <hns@goldelico.com> # on CI20
Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
Acked-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Diffstat (limited to 'arch/mips/boot')
-rw-r--r-- | arch/mips/boot/dts/ingenic/ci20.dts | 24 |
1 files changed, 14 insertions, 10 deletions
diff --git a/arch/mips/boot/dts/ingenic/ci20.dts b/arch/mips/boot/dts/ingenic/ci20.dts index 3a4eaf1f3f48..a688809beebc 100644 --- a/arch/mips/boot/dts/ingenic/ci20.dts +++ b/arch/mips/boot/dts/ingenic/ci20.dts @@ -118,6 +118,20 @@ assigned-clock-rates = <48000000>; }; +&tcu { + /* + * 750 kHz for the system timers and clocksource, + * use channel #0 and #1 for the per cpu system timers, + * and use channel #2 for the clocksource. + * + * 3000 kHz for the OST timer to provide a higher + * precision clocksource. + */ + assigned-clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>, + <&tcu TCU_CLK_TIMER2>, <&tcu TCU_CLK_OST>; + assigned-clock-rates = <750000>, <750000>, <750000>, <3000000>; +}; + &mmc0 { status = "okay"; @@ -522,13 +536,3 @@ bias-disable; }; }; - -&tcu { - /* - * 750 kHz for the system timer and clocksource, - * use channel #0 for the system timer, #1 for the clocksource. - */ - assigned-clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER1>, - <&tcu TCU_CLK_OST>; - assigned-clock-rates = <750000>, <750000>, <3000000>; -}; |