diff options
author | Guo Ren <guoren@linux.alibaba.com> | 2020-03-28 19:14:37 +0800 |
---|---|---|
committer | Guo Ren <guoren@linux.alibaba.com> | 2020-04-03 12:40:07 +0800 |
commit | aefd9461d34a1b0a2acad0750c43216c1c27b9d4 (patch) | |
tree | 5758db614e0a99fc098daa1433d400196e690704 /arch/csky/abiv2 | |
parent | 8f6bb793b2be82f1f73bfb416486f156f70b4314 (diff) |
csky: Fixup cpu speculative execution to IO area
For the memory size ( > 512MB, < 1GB), the MSA setting is:
- SSEG0: PHY_START , PHY_START + 512MB
- SSEG1: PHY_START + 512MB, PHY_START + 1GB
But the real memory is no more than 1GB, there is a gap between the
end size of memory and border of 1GB. CPU could speculatively
execute to that gap and if the gap of the bus couldn't respond to
the CPU request, then the crash will happen.
Now make the setting with:
- SSEG0: PHY_START , PHY_START + 512MB (no change)
- SSEG1: Disabled (We use highmem to use the memory of 512MB~1GB)
We also deprecated zhole_szie[] settings, it's only used by arm
style CPUs. All memory gap should use Reserved setting of dts in
csky system.
Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
Diffstat (limited to 'arch/csky/abiv2')
-rw-r--r-- | arch/csky/abiv2/inc/abi/entry.h | 7 |
1 files changed, 2 insertions, 5 deletions
diff --git a/arch/csky/abiv2/inc/abi/entry.h b/arch/csky/abiv2/inc/abi/entry.h index 6a404393d0f4..a99aff555a0a 100644 --- a/arch/csky/abiv2/inc/abi/entry.h +++ b/arch/csky/abiv2/inc/abi/entry.h @@ -290,11 +290,8 @@ addi r6, 0x1ce mtcr r6, cr<30, 15> /* Set MSA0 */ - lsri r6, 28 - addi r6, 2 - lsli r6, 28 - addi r6, 0x1ce - mtcr r6, cr<31, 15> /* Set MSA1 */ + movi r6, 0 + mtcr r6, cr<31, 15> /* Clr MSA1 */ /* enable MMU */ mfcr r6, cr18 |