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authorRoger Quadros <rogerq@ti.com>2020-09-30 15:20:29 +0300
committerNishanth Menon <nm@ti.com>2020-09-30 07:34:02 -0500
commit9a09e6e9cfcf5424e78636e9b9585de5c07407bc (patch)
tree8aab3cbaaad06d93e5d8c2fdb4433b719da2b457 /arch/arm64/boot
parent1509295295c03c570bd65c3e393b334c188218cd (diff)
arm64: dts: ti: k3-j7200-main.dtsi: Add USB to SERDES lane MUX
The USB controller can be connected to one of the 2 lanes of SERDES0 using a MUX. Add a MUX controller node for that. Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com> Link: https://lore.kernel.org/r/20200930122032.23481-4-rogerq@ti.com
Diffstat (limited to 'arch/arm64/boot')
-rw-r--r--arch/arm64/boot/dts/ti/k3-j7200-main.dtsi6
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
index 8997276158ca..c638c3d8c0f2 100644
--- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
+++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
@@ -31,6 +31,12 @@
mux-reg-masks = <0x4080 0x3>, <0x4084 0x3>, /* SERDES0 lane0/1 select */
<0x4088 0x3>, <0x408c 0x3>; /* SERDES0 lane2/3 select */
};
+
+ usb_serdes_mux: mux-controller@4000 {
+ compatible = "mmio-mux";
+ #mux-control-cells = <1>;
+ mux-reg-masks = <0x4000 0x8000000>; /* USB0 to SERDES0 lane 1/3 mux */
+ };
};
gic500: interrupt-controller@1800000 {