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author | Valentin Longchamp <valentin.longchamp@epfl.ch> | 2009-08-10 18:33:10 +0200 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2009-08-14 12:40:48 +0200 |
commit | 89829d5fe31dc42825f2560c3c2c641709ed594e (patch) | |
tree | 3992124c9b203e8d110a27073718c88fdd44b022 /arch/arm/plat-mxc/include/mach/iomux-mx3.h | |
parent | 94da274b4982f5b36b55bde0c76d3ef8233bceda (diff) |
mx31: added one more pin definition
Signed-off-by: Valentin Longchamp <valentin.longchamp@epfl.ch>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/plat-mxc/include/mach/iomux-mx3.h')
-rw-r--r-- | arch/arm/plat-mxc/include/mach/iomux-mx3.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx3.h b/arch/arm/plat-mxc/include/mach/iomux-mx3.h index a3b206ce78b8..674527327946 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-mx3.h +++ b/arch/arm/plat-mxc/include/mach/iomux-mx3.h @@ -682,6 +682,7 @@ enum iomux_pins { #define MX31_PIN_GPIO3_0__GPIO3_0 IOMUX_MODE(MX31_PIN_GPIO3_0, IOMUX_CONFIG_GPIO) #define MX31_PIN_GPIO3_1__GPIO3_1 IOMUX_MODE(MX31_PIN_GPIO3_1, IOMUX_CONFIG_GPIO) #define MX31_PIN_TXD2__GPIO1_28 IOMUX_MODE(MX31_PIN_TXD2, IOMUX_CONFIG_GPIO) +#define MX31_PIN_GPIO1_0__GPIO1_0 IOMUX_MODE(MX31_PIN_GPIO1_0, IOMUX_CONFIG_GPIO) /*XXX: The SS0, SS1, SS2, SS3 lines of spi3 are multiplexed by cspi2_ss0, cspi2_ss1, cspi1_ss0 * cspi1_ss1*/ |