diff options
author | Geert Uytterhoeven <geert+renesas@glider.be> | 2016-02-15 13:20:08 +0100 |
---|---|---|
committer | Simon Horman <horms+renesas@verge.net.au> | 2016-02-17 18:27:21 +0900 |
commit | 901c5ffaaed117a38be9d0c29247c4888d6c8636 (patch) | |
tree | 8eb8a8d8586c27c4667f1b4a615e13fdb1f099fb /arch/arm/mach-shmobile/headsmp.S | |
parent | 4e960f52fce16a3bf3261fa92c34cf2306059ba2 (diff) |
ARM: shmobile: Remove shmobile_boot_arg
CPU boot configuration writes to shmobile_boot_arg, which is located in
the .text section, and thus should not be written to.
As of commit 1d33a354bbb618ba ("ARM: shmobile: Per-CPU SMP boot / sleep
code for SCU SoCs"), and ignoring accidental remainings,
shmobile_boot_arg is always set to MPIDR_HWID_BITMASK by C code.
Hence we can just hardcode this in the assembler code, and remove the
variable, and thus also remove the need to write to this variable.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm/mach-shmobile/headsmp.S')
-rw-r--r-- | arch/arm/mach-shmobile/headsmp.S | 8 |
1 files changed, 2 insertions, 6 deletions
diff --git a/arch/arm/mach-shmobile/headsmp.S b/arch/arm/mach-shmobile/headsmp.S index 94d86ed16414..32e0bf6e3ccb 100644 --- a/arch/arm/mach-shmobile/headsmp.S +++ b/arch/arm/mach-shmobile/headsmp.S @@ -24,7 +24,6 @@ .arm .align 12 ENTRY(shmobile_boot_vector) - ldr r0, 2f ldr r1, 1f bx r1 @@ -34,9 +33,6 @@ ENDPROC(shmobile_boot_vector) .globl shmobile_boot_fn shmobile_boot_fn: 1: .space 4 - .globl shmobile_boot_arg -shmobile_boot_arg: -2: .space 4 .globl shmobile_boot_size shmobile_boot_size: .long . - shmobile_boot_vector @@ -46,9 +42,9 @@ shmobile_boot_size: */ ENTRY(shmobile_smp_boot) - @ r0 = MPIDR_HWID_BITMASK mrc p15, 0, r1, c0, c0, 5 @ r1 = MPIDR - and r0, r1, r0 @ r0 = cpu_logical_map() value + and r0, r1, #0xffffff @ MPIDR_HWID_BITMASK + @ r0 = cpu_logical_map() value mov r1, #0 @ r1 = CPU index adr r2, 1f ldmia r2, {r5, r6, r7} |