summaryrefslogtreecommitdiff
path: root/arch/arm/mach-omap2/clock44xx_data.c
diff options
context:
space:
mode:
authorArnd Bergmann <arnd@arndb.de>2011-11-23 20:47:41 +0000
committerArnd Bergmann <arnd@arndb.de>2011-11-23 20:47:41 +0000
commit58a273745fbb2fbd01d26e7a60f0acc8c1d99469 (patch)
treebc16200f3b6ea150b298422754e32959eaa339bc /arch/arm/mach-omap2/clock44xx_data.c
parent951c486f62490e032da0ad17e93270b0cfb6687f (diff)
parent0116da4fcc1ae8a80d9002441e98768f2a6fa2fe (diff)
Merge branches 'drivers/macb-gem' and 'drivers/pxa-gpio' into next/drivers
Diffstat (limited to 'arch/arm/mach-omap2/clock44xx_data.c')
-rw-r--r--arch/arm/mach-omap2/clock44xx_data.c43
1 files changed, 23 insertions, 20 deletions
diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c
index 946bf04a956d..0798a802497a 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -270,8 +270,8 @@ static struct clk dpll_abe_ck = {
.dpll_data = &dpll_abe_dd,
.init = &omap2_init_dpll_parent,
.ops = &clkops_omap3_noncore_dpll_ops,
- .recalc = &omap3_dpll_recalc,
- .round_rate = &omap2_dpll_round_rate,
+ .recalc = &omap4_dpll_regm4xen_recalc,
+ .round_rate = &omap4_dpll_regm4xen_round_rate,
.set_rate = &omap3_noncore_dpll_set_rate,
};
@@ -1195,11 +1195,25 @@ static struct clk l4_wkup_clk_mux_ck = {
.recalc = &omap2_clksel_recalc,
};
+static const struct clksel_rate div2_2to1_rates[] = {
+ { .div = 1, .val = 1, .flags = RATE_IN_4430 },
+ { .div = 2, .val = 0, .flags = RATE_IN_4430 },
+ { .div = 0 },
+};
+
+static const struct clksel ocp_abe_iclk_div[] = {
+ { .parent = &aess_fclk, .rates = div2_2to1_rates },
+ { .parent = NULL },
+};
+
static struct clk ocp_abe_iclk = {
.name = "ocp_abe_iclk",
.parent = &aess_fclk,
+ .clksel = ocp_abe_iclk_div,
+ .clksel_reg = OMAP4430_CM1_ABE_AESS_CLKCTRL,
+ .clksel_mask = OMAP4430_CLKSEL_AESS_FCLK_MASK,
.ops = &clkops_null,
- .recalc = &followparent_recalc,
+ .recalc = &omap2_clksel_recalc,
};
static struct clk per_abe_24m_fclk = {
@@ -1398,9 +1412,9 @@ static struct clk dss_dss_clk = {
};
static const struct clksel_rate div3_8to32_rates[] = {
- { .div = 8, .val = 0, .flags = RATE_IN_44XX },
- { .div = 16, .val = 1, .flags = RATE_IN_44XX },
- { .div = 32, .val = 2, .flags = RATE_IN_44XX },
+ { .div = 8, .val = 0, .flags = RATE_IN_4460 },
+ { .div = 16, .val = 1, .flags = RATE_IN_4460 },
+ { .div = 32, .val = 2, .flags = RATE_IN_4460 },
{ .div = 0 },
};
@@ -3363,17 +3377,6 @@ static struct omap_clk omap44xx_clks[] = {
CLK("usbhs-omap.0", "usbhost_ick", &dummy_ck, CK_443X),
CLK("usbhs-omap.0", "usbtll_fck", &dummy_ck, CK_443X),
CLK("omap_wdt", "ick", &dummy_ck, CK_443X),
- CLK("omap_timer.1", "fck", &timer1_fck, CK_443X),
- CLK("omap_timer.2", "fck", &timer2_fck, CK_443X),
- CLK("omap_timer.3", "fck", &timer3_fck, CK_443X),
- CLK("omap_timer.4", "fck", &timer4_fck, CK_443X),
- CLK("omap_timer.5", "fck", &timer5_fck, CK_443X),
- CLK("omap_timer.6", "fck", &timer6_fck, CK_443X),
- CLK("omap_timer.7", "fck", &timer7_fck, CK_443X),
- CLK("omap_timer.8", "fck", &timer8_fck, CK_443X),
- CLK("omap_timer.9", "fck", &timer9_fck, CK_443X),
- CLK("omap_timer.10", "fck", &timer10_fck, CK_443X),
- CLK("omap_timer.11", "fck", &timer11_fck, CK_443X),
CLK("omap_timer.1", "32k_ck", &sys_32k_ck, CK_443X),
CLK("omap_timer.2", "32k_ck", &sys_32k_ck, CK_443X),
CLK("omap_timer.3", "32k_ck", &sys_32k_ck, CK_443X),
@@ -3403,12 +3406,12 @@ int __init omap4xxx_clk_init(void)
struct omap_clk *c;
u32 cpu_clkflg;
- if (cpu_is_omap44xx()) {
+ if (cpu_is_omap443x()) {
cpu_mask = RATE_IN_4430;
cpu_clkflg = CK_443X;
} else if (cpu_is_omap446x()) {
- cpu_mask = RATE_IN_4460;
- cpu_clkflg = CK_446X;
+ cpu_mask = RATE_IN_4460 | RATE_IN_4430;
+ cpu_clkflg = CK_446X | CK_443X;
} else {
return 0;
}