diff options
| author | Christoph Fritz <chf.fritz@googlemail.com> | 2013-03-29 17:32:05 +0100 |
|---|---|---|
| committer | Tony Lindgren <tony@atomide.com> | 2013-04-08 17:00:22 -0700 |
| commit | 161e89a689bb88004b757986eefda2402448eef7 (patch) | |
| tree | a4716083a8272c106330aafd903414823c659cfd /arch/arm/boot/dts/omap3.dtsi | |
| parent | d05663a23f31a1baf25ab8894b8c3fb2a506aa6a (diff) | |
ARM/dts: OMAP3: fix pinctrl-single configuration
- Fix 'function-mask' referring to TRM (Omap 36xx) Section 13.4.4:
"Pad Functional Multiplexing and Configuration".
- Fix 'omap3_pmx_wkup' referring to TRM Table 13-6:
"Wkup Control Module Pad Configuration Register Fields".
Note that these fixes are not critical currently as we
are not yet using the missing range of pinmux registers
at this point.
Signed-off-by: Christoph Fritz <chf.fritz@googlemail.com>
[tony@atomide.com: updated comments]
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/boot/dts/omap3.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/omap3.dtsi | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi index 559b02f2cd77..4ad03d9dbf0c 100644 --- a/arch/arm/boot/dts/omap3.dtsi +++ b/arch/arm/boot/dts/omap3.dtsi @@ -33,7 +33,7 @@ }; /* - * The soc node represents the soc top level view. It is uses for IPs + * The soc node represents the soc top level view. It is used for IPs * that are not memory mapped in the MPU view or for the MPU itself. */ soc { @@ -99,16 +99,16 @@ #address-cells = <1>; #size-cells = <0>; pinctrl-single,register-width = <16>; - pinctrl-single,function-mask = <0x7fff>; + pinctrl-single,function-mask = <0x7f1f>; }; - omap3_pmx_wkup: pinmux@0x48002a58 { + omap3_pmx_wkup: pinmux@0x48002a00 { compatible = "ti,omap3-padconf", "pinctrl-single"; - reg = <0x48002a58 0x5c>; + reg = <0x48002a00 0x5c>; #address-cells = <1>; #size-cells = <0>; pinctrl-single,register-width = <16>; - pinctrl-single,function-mask = <0x7fff>; + pinctrl-single,function-mask = <0x7f1f>; }; gpio1: gpio@48310000 { |