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authorBoris BREZILLON <boris.brezillon@free-electrons.com>2014-09-23 16:45:12 +0200
committerNicolas Ferre <nicolas.ferre@atmel.com>2014-11-13 16:08:48 +0100
commit2c91e61dc97cce57ffd9dd654a6ee284e1f45a1f (patch)
treec0ae4bcef8ff4dc19c678d1d916bbf0c00acb138 /Documentation
parenta975f47f6e9a4e9762c81973cf2305003aa5b7dc (diff)
rtc: at91sam9: add DT bindings documentation
Add RTT bindings documentation. Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Acked-by: Johan Hovold <johan@kernel.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/rtc/atmel,at91sam9-rtc.txt23
1 files changed, 23 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/rtc/atmel,at91sam9-rtc.txt b/Documentation/devicetree/bindings/rtc/atmel,at91sam9-rtc.txt
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+++ b/Documentation/devicetree/bindings/rtc/atmel,at91sam9-rtc.txt
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+Atmel AT91SAM9260 Real Time Timer
+
+Required properties:
+- compatible: should be: "atmel,at91sam9260-rtt"
+- reg: should encode the memory region of the RTT controller
+- interrupts: rtt alarm/event interrupt
+- clocks: should contain the 32 KHz slow clk that will drive the RTT block.
+- atmel,rtt-rtc-time-reg: should encode the GPBR register used to store
+ the time base when the RTT is used as an RTC.
+ The first cell should point to the GPBR node and the second one
+ encode the offset within the GPBR block (or in other words, the
+ GPBR register used to store the time base).
+
+
+Example:
+
+rtt@fffffd20 {
+ compatible = "atmel,at91sam9260-rtt";
+ reg = <0xfffffd20 0x10>;
+ interrupts = <1 4 7>;
+ clocks = <&clk32k>;
+ atmel,rtt-rtc-time-reg = <&gpbr 0x0>;
+};