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| author | Dan Williams <dan.j.williams@intel.com> | 2009-09-08 17:42:53 -0700 |
|---|---|---|
| committer | Dan Williams <dan.j.williams@intel.com> | 2009-09-08 17:42:53 -0700 |
| commit | 83544ae9f3991bfc7d5e0fe9a3008cd05a8d57b7 (patch) | |
| tree | bc4b28c2e5bdae01a2c8a250176fcdac6ae7a8ce /Documentation/SubmittingDrivers | |
| parent | 9308add6ea4fedeba37b0d7c4630a542bd34f214 (diff) | |
dmaengine, async_tx: support alignment checks
Some engines have transfer size and address alignment restrictions. Add
a per-operation alignment property to struct dma_device that the async
routines and dmatest can use to check alignment capabilities.
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'Documentation/SubmittingDrivers')
0 files changed, 0 insertions, 0 deletions