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authorRussell King <rmk+kernel@arm.linux.org.uk>2013-10-19 17:38:44 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2014-02-24 12:03:51 +0000
commit370b181516f205a9761767808e4702832834faf1 (patch)
tree6e907af1b31eacaeeee901a8e2467d1dbbf3a37b
parent24013ea8ff5711ef548b709d2f93d541f0bf504a (diff)
imx-drm: ipu-v3: don't use clk_round_rate() before clk_set_rate()
This is nonsense; clk_round_rate() is just clk_set_rate() without the side effect of changing the hardware. Acked-by: Philipp Zabel <p.zabel@pengutronix.de> Acked-by: Shawn Guo <shawn.guo@linaro.org> Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
-rw-r--r--drivers/staging/imx-drm/ipu-v3/ipu-di.c13
1 files changed, 9 insertions, 4 deletions
diff --git a/drivers/staging/imx-drm/ipu-v3/ipu-di.c b/drivers/staging/imx-drm/ipu-v3/ipu-di.c
index 8c7241bb435c..d766e18bfca0 100644
--- a/drivers/staging/imx-drm/ipu-v3/ipu-di.c
+++ b/drivers/staging/imx-drm/ipu-v3/ipu-di.c
@@ -560,9 +560,10 @@ int ipu_di_init_sync_panel(struct ipu_di *di, struct ipu_di_signal_cfg *sig)
* rate within 1% of the requested frequency, otherwise we use
* the DI clock.
*/
- if (sig->clkflags & IPU_DI_CLKMODE_EXT)
+ round = sig->pixelclock;
+ if (sig->clkflags & IPU_DI_CLKMODE_EXT) {
parent = di->clk_di;
- else {
+ } else {
unsigned long rate, clkrate;
unsigned div, error;
@@ -584,6 +585,9 @@ int ipu_di_init_sync_panel(struct ipu_di *di, struct ipu_di_signal_cfg *sig)
ret = clk_set_rate(parent, sig->pixelclock);
if (ret)
dev_err(di->ipu->dev, "Setting of DI clock failed: %d\n", ret);
+
+ /* Use the integer divisor rate - avoid fractional dividers */
+ round = rate;
}
}
@@ -599,11 +603,12 @@ int ipu_di_init_sync_panel(struct ipu_di *di, struct ipu_di_signal_cfg *sig)
* CLKMODE_SYNC means that we want the DI to be clocked at the
* same rate as the parent clock. This is needed (eg) for LDB
* which needs to be fed with the same pixel clock.
+ *
+ * Note: clk_set_rate(clk, clk_round_rate(clk, rate)) is the
+ * same as clk_set_rate(clk, rate);
*/
if (sig->clkflags & IPU_DI_CLKMODE_SYNC)
round = clk_get_rate(parent);
- else
- round = clk_round_rate(di->clk_di_pixel, sig->pixelclock);
ret = clk_set_rate(di->clk_di_pixel, round);