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path: root/drivers/spi/spi-fsl-dspi.c
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2017-05-22spi: spi-fsl-dspi: ensure non-zero return on error pathNikita Yushchenko1-1/+2
Propagate error return from dspi_request_dma() into probe routine's return. Signed-off-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-02-19spi: spi-fsl-dspi: Fix error handlingChristophe JAILLET1-1/+2
According to error handling in this function, it is likely that going to 'out_master_put' was expected here. Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-12-12Merge remote-tracking branches 'spi/topic/delay', 'spi/topic/dw', ↵Mark Brown1-4/+302
'spi/topic/fsl-dspi' and 'spi/topic/fsl-espi' into spi-next
2016-11-22spi: spi-fsl-dspi: Fix continuous selection formatSanchayan Maity1-14/+6
Current DMA implementation was not handling the continuous selection format viz. SPI chip select would be deasserted even between sequential serial transfers. Use existing dspi_data_to_pushr function to restructure the transmit code path and set or reset the CONT bit on same lines as code path in EOQ mode does. This correctly implements continuous selection format while also correcting and cleaning up the transmit code path. Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-11-22spi: spi-fsl-dspi: Fix incorrect DMA setupSanchayan Maity1-17/+18
Currently dmaengine_prep_slave_single was being called with length set to the complete DMA buffer size. This resulted in unwanted bytes being transferred to the SPI register leading to clock and MOSI lines having unwanted data even after chip select got deasserted and the required bytes having been transferred. While at it also clean up the use of curr_xfer_len which is central to the DMA setup, from bytes to DMA transfers for every use. Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com> Reviewed-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-11-22spi: spi-fsl-dspi: Fix incorrect freeing of DMA allocated buffersSanchayan Maity1-2/+4
Buffers allocated with a call to dma_alloc_coherent should be freed with dma_free_coherent instead of the currently used devm_kfree. Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-11-18spi: spi-fsl-dspi: Fix SPI transfer issue when using multiple SPI_IOC_MESSAGESanchayan Maity1-4/+8
Current DMA implementation had a bug where the DMA transfer would exit the loop in dspi_transfer_one_message after the completion of a single transfer. This results in a multi message transfer submitted with SPI_IOC_MESSAGE to terminate incorrectly without an error. Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com> Reviewed-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-11-11spi: spi-fsl-dspi: Add DMA support for VybridSanchayan Maity1-1/+300
Add DMA support for Vybrid. Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-10-29spi: dspi: clear SPI_SR before enable interruptYuan Yao1-0/+7
Once dspi is used in uboot, the SPI_SR have been set by some value. At this time, if kernel enable the interrupt before clear the status flag, that will trigger the wrong interrupt. Signed-off-by: Yuan Yao <yao.yuan@nxp.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-08-22spi: spi-fsl-dspi: Drop extra spi_master_put in device remove functionWei Yongjun1-1/+0
The call sequence spi_alloc_master/spi_register_master/spi_unregister_master is complete; it reduces the device reference count to zero, which and results in device memory being freed. The subsequent call to spi_master_put is unnecessary and results in an access to free memory. Drop it. Fixes: 9298bc727385 ("spi: spi-fsl-dspi: Remove spi-bitbang") Signed-off-by: Wei Yongjun <weiyj.lk@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-08-22spi: spi-fsl-dspi: Check clk_prepare_enable() errorFabio Estevam1-2/+7
clk_prepare_enable() may fail, so we should better check its return value and propagate it in the case of failure. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-08-16spi: spi-fsl-dspi: fix a possible NULL dereferenceLABBE Corentin1-3/+1
of_match_device could return NULL, and so cause a NULL pointer dereference later. For fixing this problem, we use of_device_get_match_data(), this will simplify the code a little by using a standard function for getting the match data. Reported-by: coverity (CID 1324129) Signed-off-by: LABBE Corentin <clabbe.montjoie@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-08-16spi: spi-fsl-dspi: constify devtype_dataLABBE Corentin1-2/+2
of_id->data is const, so instead of casting the pointer to drop its const status, this patch constify the devtype_data pointer. Signed-off-by: LABBE Corentin <clabbe.montjoie@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-05-23Merge remote-tracking branches 'spi/topic/dw', 'spi/topic/flash-read', ↵Mark Brown1-0/+7
'spi/topic/fsl-dspi', 'spi/topic/fsl-espi' and 'spi/topic/kconfig' into spi-next
2016-04-05spi: spi-fsl-dspi: Fix cs_change handling in message transferAndrey Vostrikov1-2/+2
There are use cases when chip select should be triggered between transfers in single SPI message. Current implementation does this only on last transfer in message ignoring cs_change value provided in current transfer. Signed-off-by: Andrey Vostrikov <andrey.vostrikov@cogentembedded.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-03-23spi: fsl-dspi: Set max_speed_hz for masterBhuvanchandra DV1-0/+7
Calculate and update max speed from bus clock for SoCs using DSPI IP. The bus clock factor's are taken from the data sheets of respective SoCs. Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com> Acked-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-12-12spi-fsl-dspi: Fix CTAR Register accessBhuvanchandra DV1-6/+6
DSPI instances in Vybrid have a different amount of chip selects and CTARs (Clock and transfer Attributes Register). In case of DSPI1 we only have 2 CTAR registers and 4 CS. In present driver implementation CTAR offset is derived from CS instance which will lead to out of bound access if chip select instance is greater than CTAR register instance, hence use single CTAR0 register for all CS instances. Since we write the CTAR register anyway before each access, there is no value in using the additional CTAR registers. Also one should not program a value in CTAS for a CTAR register that is not present, hence configure CTAS to use CTAR0. Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com> Acked-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-09-17spi: spi-fsl-dspi: Remove duplicated register writeJarkko Nikula1-3/+0
SPI core makes sure that transfer speed is always set so code here writes the same register with the same value twice. Code has been doing this from the beginning. This looks to me some sort of copy paste error so I'm removing the second write. If this is not the case we can bring it back with a comment. Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-06-12spi: fsl-dspi: Use pinctrl PM helpersMirza Krak1-0/+5
Add support for "sleep" state of pinctrl. Signed-off-by: Mirza Krak <mirza.krak@hostmobility.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-06-09spi: spi-fsl-dspi: Change the way of increasing spi_message->actual_lengthHaikun Wang1-33/+68
In current driver, we increase actual_length in the following way: message->actual_length += dspi_xxx_transfer() It has two defects. First, transmitting maybe in process when the function call finished and we don't know the transmitting result in this moment. Secondly, the last sentence in function before returning is accessing the SPI register and trigger the data transmitting. If we enable interrupt, interrupt may be generated before function return and we also have the same sentence "message->actual_length += dspi_xxx_transfer()" in the IRQ handler. And usually dspi_xxx_transfer will trigger a new IRQ. The original dspi_xxx_transfer call may return when no new IRQ generate. This may mess the variable spi_message->actual_length. Now we increase the variable in the IRQ handler and only when we get the TCF or EOQ interrupt And we get the transmitted data length from the SPI transfer counter instead of the function return value. Signed-off-by: Haikun Wang <haikun.wang@freescale.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-06-09spi: spi-fsl-dspi: Enable TCF interrupt mode supportHaikun Wang1-76/+169
DSPI module has two optional interrupts when complete data transfer. One is EOQ interrupt, the other one is TCF interrupt. EOQ indicates a queue of data frame has been transmitted. TCF indicates a frame has been transmitted. This patch enable support TCF mode. Driver binds a correct interrupt mode to every compatible string. User should use the correct compatible string in the dts node. Signed-off-by: Haikun Wang <haikun.wang@freescale.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-06-09Merge branch 'fix/fsl-dspi' of ↵Mark Brown1-18/+83
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi into spi-fsl-dspi
2015-05-21spi: spi-fsl-dspi: Bug fix incorrect CS de-assertHaikun Wang1-2/+2
SPI chip select signal need to keep asserted between several spi_transfer in the same spi_message usually. But the driver will de-assert CS signal and the assert it between serval spi_transfer in the same spi_message under some condiations. This patch fix the bug. Here is an example: Assume you have two variables like the following, struct spi_transfer a; struct spi_transfer b; if you send a spi_message only includes 'a' first, and then you send a spi_message includes 'a' and 'b' but without resetting 'a'. Driver will de-assert CS and then assert CS between 'a' and 'b'. Signed-off-by: Haikun Wang <haikun.wang@freescale.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-04-24spi: spi-fsl-dspi: remove clk reference when regmap_mmio initializeHaikun Wang1-1/+1
It is unnecessary for DSPI to enable/disable clk when access DSPI register. And it will reduce efficiency. Signed-off-by: Haikun Wang <haikun.wang@freescale.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-04-07Merge branch 'fix/fsl-dspi' of ↵Mark Brown1-0/+2
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi into spi-fsl-dspi Conflicts: drivers/spi/spi-fsl-dspi.c
2015-04-06spi: fsl-dspi: Add ~50ns delay between cs and sckAaron Brice1-4/+60
Add delay between chip select and clock signals, before clock starts and after clock stops. Signed-off-by: Aaron Brice <aaron.brice@datasoft.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-04-06spi: fsl-dspi: Fix clock rate scale valuesAaron Brice1-14/+23
Previous algorithm had an outer loop with the values {2,3,5,7} and an inner loop with {2,4,6,8,16,32,...,32768}, and would pick the first value over the required scaling value (where the total scale was the two numbers multiplied). Since the inner loop went up to 32768 it would always pick a value of 2 for PBR and a much higher than necessary value for BR. The desired scale factor was being divided by two I believe to compensate for the much higher scale factors (the divide by two not specified in the reference manual). Updated to check all values and find the smallest scale factor possible without going over the desired clock rate. Signed-off-by: Aaron Brice <aaron.brice@datasoft.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-03-31spi: fsl-dspi: Fix clock rate scale valuesAaron Brice1-14/+21
Previous algorithm had an outer loop with the values {2,3,5,7} and an inner loop with {2,4,6,8,16,32,...,32768}, and would pick the first value over the required scaling value (where the total scale was the two numbers multiplied). Since the inner loop went up to 32768 it would always pick a value of 2 for PBR and a much higher than necessary value for BR. The desired scale factor was being divided by two I believe to compensate for the much higher scale factors (the divide by two not specified in the reference manual). Updated to check all values and find the smallest scale factor possible without going over the desired clock rate. Signed-off-by: Aaron Brice <aaron.brice@datasoft.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-02-02spi: fsl-dspi: Remove possible memory leak of 'chip'Bhuvanchandra DV1-6/+7
Move the check for spi->bits_per_word before allocation, to avoid memory leak. Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-01-28spi: spi-fsl-dspi: Remove spi-bitbangChao Fu1-73/+71
DSPI module need cs change information in a spi transfer. According to cs change, DSPI will give last data the right flag. Bitbang provide cs change behind the last data in a transfer. So DSPI can not deal the last data in every transfer properly, so remove the bitbang in the driver. Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-01-27spi: spi-fsl-dspi: Remove usage of devm_kzallocBhuvanchandra DV1-2/+12
devm_* API was supposed to be used only in probe function call. Memory is allocated at 'probe' and free automatically at 'remove'. Usage of devm_* functions outside probe sometimes leads to memory leak. Avoid using devm_kzalloc in dspi_setup_transfer and use kzalloc instead. Also add the dspi_cleanup function to free the controller data upon cleanup. Acked-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com> Signed-off-by: Mark Brown <broonie@kernel.org> Cc: stable@vger.kernel.org
2014-12-08Merge remote-tracking branches 'spi/topic/fsl-dspi', 'spi/topic/fsl-espi', ↵Mark Brown1-2/+1
'spi/topic/gpio', 'spi/topic/img-spfi' and 'spi/topic/meson' into spi-next
2014-11-04spi: fsl-dspi: Fix CTAR selectionAlexander Stein1-2/+2
There are only 4 CTAR registers (CTAR0 - CTAR3) so we can only use the lower 2 bits of the chip select to select a CTAR register. SPI_PUSHR_CTAS used the lower 3 bits which would result in wrong bit values if the chip selects 4/5 are used. For those chip selects SPI_CTAR even calculated offsets of non-existing registers. Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com> Signed-off-by: Mark Brown <broonie@kernel.org> Cc: stable@vger.kernel.org
2014-10-20spi: fsl-dspi: remove useless code for dspi driver.Xiubo Li1-2/+1
Since we are using regmap framework's internal locks, so the lock_arg for dspi_regmap_config is redundant here. This patch just remove it, and then the dspi_regmap_config could be const type. Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2014-10-03Merge remote-tracking branches 'spi/topic/fsl-dspi', 'spi/topic/imx', ↵Mark Brown1-4/+0
'spi/topic/mxs', 'spi/topic/omap-100k' and 'spi/topic/orion' into spi-next
2014-09-29spi: fsl: Sort include headers alphabeticallyXiubo Li1-9/+9
Sort all the include headers alphabetically for the freescale spi drivers. If the inlcude headers sorted out of order, maybe the best logical choice is to append new ones after the exist ones, while this may create a lot of potential for duplicates and conflicts for each diffenent changes will add new headers in the same location. Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2014-09-25spi: fsl-dspi: Remove probe info messageAlexander Stein1-1/+0
Remove the probe info message which also has wrong output. No need to add KERN_INFO to pr_info. Output was: 6Freescale DSPI master initialized Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2014-08-18spi: fsl-dspi: Convert to use regmap framework's endianness method.Xiubo Li1-3/+0
Signed-off-by: Xiubo Li <Li.Xiubo@freescale.com> Acked-by: Chao Fu <b44548@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-05-07spi: fsl-dspi: Make of_device_id array constJingoo Han1-1/+1
Make of_device_id array const, because all OF functions handle it as const. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-03-30Merge remote-tracking branches 'spi/topic/drivers', 'spi/topic/dw', ↵Mark Brown1-35/+59
'spi/topic/efm32', 'spi/topic/ep93xx', 'spi/topic/fsl', 'spi/topic/fsl-dspi', 'spi/topic/fsl-espi' and 'spi/topic/gpio' into spi-next
2014-03-28spi: fsl-dspi: Fix memory leakAxel Lin1-2/+2
The memory allocated for chip is not freed anywhere. Convert to use devm_kzalloc to fix the memory leak. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-03-05spi: fsl-dspi: Use SIMPLE_DEV_PM_OPS macroJingoo Han1-3/+1
Use SIMPLE_DEV_PM_OPS macro in order to make the code simpler. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-03-05spi: fsl-dspi: Fix getting correct address for masterAxel Lin1-3/+3
Current code set platform drvdata to dspi. However, the code in dspi_suspend() and dspi_resume() assumes the drvdata is the address of master. Fix it by setting platform drvdata to master. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org> Cc: stable@vger.kernel.org
2014-02-16spi/fsl-dspi: Remove some coding sytle not in standardChao Fu1-4/+4
Remove some coding sytle not in standard in former code. Signed-off-by: Chao Fu <b44548@freescale.com> Reviewed-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-16spi/fsl-dspi: Convert to use regmap and add big-endian supportChao Fu1-27/+53
Freescale DSPI module will have two endianess in different platform, but ARM is little endian. So when DSPI in big endian, core in little endian, readl and writel can not adjust R/W register in this condition. This patch will remove general readl/writel, and import regmap mechanism. Data endian will be transfered in regmap APIs. Documents: dspi add bool "big-endian" in dts node if DSPI module work in big endian. Signed-off-by: Chao Fu <b44548@freescale.com> Reviewed-by: Xiubo Li <Li.Xiubo@freescale.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-01-23Merge remote-tracking branches 'spi/topic/bcm2835', 'spi/topic/bcm63xx', ↵Mark Brown1-3/+0
'spi/topic/bcm63xx-hsspi', 'spi/topic/bitbang', 'spi/topic/bpw', 'spi/topic/clps711x', 'spi/topic/coldfire', 'spi/topic/davinci', 'spi/topic/dw' and 'spi/topic/falcon' into spi-linus
2014-01-17spi: Remove duplicate code to set default bits_per_word settingAxel Lin1-3/+0
The implementation in spi_setup() already set spi->bits_per_word = 8 when spi->bits_per_word is 0 before calling spi->master->setup. So we don't need to do it again in setup() callback. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Marek Vasut <marex@denx.de> Acked-by: Barry Song <Baohua.Song@csr.com> Acked-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-01-09spi: fsl-dspi: Add missing breaks for switch casesAxel Lin1-0/+2
Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2013-10-25Merge remote-tracking branch 'spi/topic/dspi' into spi-nextMark Brown1-4/+4
2013-10-25Merge remote-tracking branch 'spi/fix/efm' into spi-linusMark Brown1-1/+1
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