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path: root/drivers/gpu/drm/i915/intel_engine_cs.c
AgeCommit message (Expand)AuthorFilesLines
2017-03-03drm/i915: Don't use enums for hardware engine idMichal Wajdeczko1-2/+2
2017-03-03drm/i915: Generalise wait for execlists to be idleChris Wilson1-0/+13
2017-03-03drm/i915: Ensure the engine is idle before manually changing HWSChris Wilson1-0/+31
2017-03-01drm/i915: Move w/a LRI debug message from context-init to driver loadChris Wilson1-19/+19
2017-02-23drm/i915: Keep a global seqno per-engineChris Wilson1-2/+0
2017-02-17drm/i915: Move common workaround code to intel_engine_csTvrtko Ursulin1-0/+550
2017-02-17drm/i915: Simplify cleanup path in intel_engines_initTvrtko Ursulin1-3/+1
2017-02-13drm/i915: Add unit tests for the breadcrumb rbtree, insert/removeChris Wilson1-0/+4
2017-01-24drm/i915: Split intel_engine allocation and initialisationChris Wilson1-19/+61
2017-01-19drm/i915: Remove i915_vma_create from VMA APIChris Wilson1-1/+1
2016-12-18drm/i915: Unify active context tracking between legacy/execlists/gucChris Wilson1-2/+19
2016-12-01drm/i915: Make various init functions take dev_privTvrtko Ursulin1-3/+2
2016-12-01drm/i915: Make GEM object alloc/free and stolen created take dev_privTvrtko Ursulin1-1/+1
2016-11-14drm/i915/scheduler: Execute requests in order of prioritiesChris Wilson1-1/+2
2016-11-14drm/i915/scheduler: Signal the arrival of a new requestChris Wilson1-0/+3
2016-11-14drm/i915: Remove engine->execlist_lockChris Wilson1-1/+0
2016-11-02drm/i915: Move hangcheck code out from i915_irq.cMika Kuoppala1-5/+0
2016-10-28drm/i915: Move the global sync optimisation to the timelineChris Wilson1-2/+0
2016-10-28drm/i915: Combine seqno + tracking into a global timeline structChris Wilson1-8/+7
2016-10-28drm/i915: Reuse the active golden render state batchChris Wilson1-0/+5
2016-10-28drm/i915: Introduce an internal allocator for disposable private objectsChris Wilson1-1/+1
2016-10-25dma-buf: Rename struct fence to dma_fenceChris Wilson1-1/+1
2016-10-14drm/i915: Do not use INTEL_INFO(dev_priv)->ring_mask inside WARNsTvrtko Ursulin1-3/+4
2016-10-14drm/i915: Allocate intel_engine_cs structure only for the enabled enginesAkash Goel1-7/+19
2016-10-12drm/i915: Move common code out of i915_gpu_error.cChris Wilson1-0/+104
2016-10-07drm/i915: Reset the breadcrumbs IRQ more carefullyChris Wilson1-15/+0
2016-10-05drm/i915: Show RING registers through debugfsChris Wilson1-0/+30
2016-09-09drm/i915: Update reset path to fix incomplete requestsChris Wilson1-1/+14
2016-08-18drm/i915/cmdparser: Make initialisation failure non-fatalChris Wilson1-2/+4
2016-08-17drm/i915: Add enum for hardware engine identifiersTvrtko Ursulin1-7/+7
2016-08-15drm/i915: Introduce i915_ggtt_offset()Chris Wilson1-2/+2
2016-08-15drm/i915: Consolidate i915_vma_unpin_and_release()Chris Wilson1-8/+1
2016-08-15drm/i915: Use VMA as the primary tracker for semaphore pageChris Wilson1-4/+8
2016-08-15drm/i915: Move common seqno reset to intel_engine_cs.cChris Wilson1-0/+42
2016-08-15drm/i915: Move common scratch allocation/destroy to intel_engine_cs.cChris Wilson1-0/+50
2016-08-11drm/i915: Store number of active engines in device infoTvrtko Ursulin1-5/+5
2016-08-10drm/i915: Move missed interrupt detection from hangcheck to breadcrumbsChris Wilson1-0/+1
2016-08-05drm/i915: Enable i915_gem_wait_for_idle() without holding struct_mutexChris Wilson1-1/+7
2016-08-04drm/i915: Double check the active status on the batch poolChris Wilson1-1/+1
2016-08-04drm/i915: Refactor activity tracking for requestsChris Wilson1-1/+0
2016-08-03drm/i915: Move the common engine cleanup to intel_engine_cs.cChris Wilson1-0/+14
2016-08-02drm/i915: Rename struct intel_ringbuffer to struct intel_ringChris Wilson1-1/+1
2016-07-29drm/i915: Add missing ring_mask to PineviewChris Wilson1-0/+1
2016-07-27drm/i915/cmdparser: Remove stray intel_engine_cs *ringChris Wilson1-1/+1
2016-07-20drm/i915: Derive GEM requests from dma-fenceChris Wilson1-0/+2
2016-07-14drm/i915: Pull out some more common engine init codeTvrtko Ursulin1-0/+47
2016-07-14drm/i915: Move common engine setup into intel_engine_cs.cTvrtko Ursulin1-0/+162
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