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2013-09-05ARC: fix new Section mismatches in build (post __cpuinit cleanup)Vineet Gupta2-2/+2
--------------->8-------------------- WARNING: vmlinux.o(.text+0x708): Section mismatch in reference from the function read_arc_build_cfg_regs() to the function .init.text:read_decode_cache_bcr() WARNING: vmlinux.o(.text+0x702): Section mismatch in reference from the function read_arc_build_cfg_regs() to the function .init.text:read_decode_mmu_bcr() --------------->8-------------------- Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-09-05ARC: Fix __udelay calculationMischa Jonker1-3/+2
Cast usecs to u64, to ensure that the (usecs * 4295 * HZ) multiplication is 64 bit. Initially, the (usecs * 4295 * HZ) part was done as a 32 bit multiplication, with the result casted to 64 bit. This led to some bits falling off, causing a "DMA initialization error" in the stmmac Ethernet driver, due to a premature timeout. Signed-off-by: Mischa Jonker <mjonker@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-09-05ARC: remove console_verbose() from setup_arch()Mischa Jonker1-2/+0
It prevents kernel parameters such as 'loglevel' from doing their job. Signed-off-by: Mischa Jonker <mjonker@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-09-05ARC: Add read*_relaxed to asm/io.hMischa Jonker1-0/+4
Some drivers require these, and ARC didn't had them yet. Signed-off-by: Mischa Jonker <mjonker@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-09-05ARC: Handle un-aligned user space access in BE.Noam Camus1-7/+19
Adding endian awarness to un-aligned access exception handling. Signed-off-by: Noam Camus <noamc@ezchip.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-08-30ARC: [ASID] Track ASID allocation cycles/generationsVineet Gupta4-86/+40
This helps remove asid-to-mm reverse map While mm->context.id contains the ASID assigned to a process, our ASID allocator also used asid_mm_map[] reverse map. In a new allocation cycle (mm->ASID >= @asid_cache), the Round Robin ASID allocator used this to check if new @asid_cache belonged to some mm2 (from prev cycle). If so, it could locate that mm using the ASID reverse map, and mark that mm as unallocated ASID, to force it to refresh at the time of switch_mm() However, for SMP, the reverse map has to be maintained per CPU, so becomes 2 dimensional, hence got rid of it. With reverse map gone, it is NOT possible to reach out to current assignee. So we track the ASID allocation generation/cycle and on every switch_mm(), check if the current generation of CPU ASID is same as mm's ASID; If not it is refreshed. (Based loosely on arch/sh implementation) Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-08-30ARC: [ASID] activate_mm() == switch_mm()Vineet Gupta1-11/+9
ASID allocation changes/2 Use the fact that switch_mm() and activate_mm() are exactly same code now while acknowledging the semantical difference in comment Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-08-30ARC: [ASID] get_new_mmu_context() to conditionally allocate new ASIDVineet Gupta2-33/+25
ASID allocation changes/1 This patch does 2 things: (1) get_new_mmu_context() NOW moves mm->ASID to a new value ONLY if it was from a prev allocation cycle/generation OR if mm had no ASID allocated (vs. before would unconditionally moving to a new ASID) Callers desiring unconditional update of ASID, e.g.local_flush_tlb_mm() (for parent's address space invalidation at fork) need to first force the parent to an unallocated ASID. (2) get_new_mmu_context() always sets the MMU PID reg with unchanged/new ASID value. The gains are: - consolidation of all asid alloc logic into get_new_mmu_context() - avoiding code duplication in switch_mm() for PID reg setting - Enables future change to fold activate_mm() into switch_mm() Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-08-30ARC: [ASID] Refactor the TLB paranoid debug codeVineet Gupta3-21/+21
-Asm code already has values of SW and HW ASID values, so they can be passed to the printing routine. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-08-30ARC: [ASID] Remove legacy/unused debug codeVineet Gupta2-14/+0
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-08-30ARC: No need to flush the TLB in early bootVineet Gupta1-7/+0
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-08-30ARC: MMUv4 preps/3 - Abstract out TLB Insert/DeleteVineet Gupta2-40/+56
This reorganizes the current TLB operations into psuedo-ops to better pair with MMUv4's native Insert/Delete operations Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-08-30ARC: MMUv4 preps/2 - Reshuffle PTE bitsVineet Gupta3-25/+11
With previous commit freeing up PTE bits, reassign them so as to: - Match the bit to H/w counterpart where possible (e.g. MMUv2 GLOBAL/PRESENT, this avoids a shift in create_tlb()) - Avoid holes in _PAGE_xxx definitions Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-08-29ARC: MMUv4 preps/1 - Fold PTE K/U access flagsVineet Gupta3-48/+54
The current ARC VM code has 13 flags in Page Table entry: some software (accesed/dirty/non-linear-maps) and rest hardware specific. With 8k MMU page, we need 19 bits for addressing page frame so remaining 13 bits is just about enough to accomodate the current flags. In MMUv4 there are 2 additional flags, SZ (normal or super page) and WT (cache access mode write-thru) - and additionally PFN is 20 bits (vs. 19 before for 8k). Thus these can't be held in current PTE w/o making each entry 64bit wide. It seems there is some scope of compressing the current PTE flags (and freeing up a few bits). Currently PTE contains fully orthogonal distinct access permissions for kernel and user mode (Kr, Kw, Kx; Ur, Uw, Ux) which can be folded into one set (R, W, X). The translation of 3 PTE bits into 6 TLB bits (when programming the MMU) can be done based on following pre-requites/assumptions: 1. For kernel-mode-only translations (vmalloc: 0x7000_0000 to 0x7FFF_FFFF), PTE additionally has PAGE_GLOBAL flag set (and user space entries can never be global). Thus such a PTE can translate to Kr, Kw, Kx (as appropriate) and zero for User mode counterparts. 2. For non global entries, the PTE flags can be used to create mirrored K and U TLB bits. This is true after commit a950549c675f2c8c504 "ARC: copy_(to|from)_user() to honor usermode-access permissions" which ensured that user-space translations _MUST_ have same access permissions for both U/K mode accesses so that copy_{to,from}_user() play fair with fault based CoW break and such... There is no such thing as free lunch - the cost is slightly infalted TLB-Miss Handlers. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-08-29ARC: Code cosmetics (Nothing semantical)Vineet Gupta4-104/+77
* reduce editor lines taken by pt_regs * ARCompact ISA specific part of TLB Miss handlers clubbed together * cleanup some comments Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-08-26ARC: Entry Handler tweaks: Optimize away redundant IRQ_DISABLE_SAVEVineet Gupta2-12/+5
In the exception return path, for both U/K cases, intr are already disabled (for various existing reasons). So when we drop down to @restore_regs, we need not redo that. There was subtle issue - when intr were NOT being disabled for ret-to-kernel-but-no-preemption case - now fixed by moving the IRQ_DISABLE further up in @resume_kernel_mode. So what do we gain: * Shaves off a few insn in return path. * Eliminates the need for IRQ_DISABLE_SAVE assembler macro for ARCv2 hence allows for entry code sharing. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-08-26ARC: Exception Handlers Code consolidationVineet Gupta3-51/+37
After the recent cleanups, all the exception handlers now have same boilerplate prologue code. Move that into common macro. This reduces readability but helps greatly with sharing / duplicating entry code with ARCv2 ISA where the handlers are pretty much the same, just the entry prologue is different (due to hardware assist). Also while at it, add the missing FAKE_RET_FROM_EXCPN calls in couple of places to drop down to pure kernel mode (from exception mode) before jumping off into "C" code. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-08-26ARC: Add some .gitignore entriesVineet Gupta2-0/+2
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-08-24ARC: [lib] strchr breakage in Big-endian configurationJoern Rennecke1-0/+10
For a search buffer, 2 byte aligned, strchr() was returning pointer outside of buffer (buf - 1) ------------->8---------------- // Input buffer (default 4 byte aigned) char *buffer = "1AA_"; // actual search start (to mimick 2 byte alignment) char *current_line = &(buffer[2]); // Character to search for char c = 'A'; char *c_pos = strchr(current_line, c); printf("%s\n", c_pos) --> 'AA_' as oppose to 'A_' ------------->8---------------- Reported-by: Anton Kolesov <Anton.Kolesov@synopsys.com> Debugged-by: Anton Kolesov <Anton.Kolesov@synopsys.com> Cc: <stable@vger.kernel.org> # [3.9 and 3.10] Cc: Noam Camus <noamc@ezchip.com> Signed-off-by: Joern Rennecke <joern.rennecke@embecosm.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2013-07-26ARC: SMP build breakageVineet Gupta1-0/+1
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-07-10Merge tag 'arc-v3.11-rc1-part2' of ↵Linus Torvalds8-58/+62
git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc Pull second set of ARC architecture updates from Vineet Gupta: "Couple of Platform updates (Device Tree files primarily) given that the corresponding drivers (net/ethernet/arc/*, irqctl/irq-tb10x.c) have now been merged into your tree. Ideally these shd have been part of same submissions, oh well..." * tag 'arc-v3.11-rc1-part2' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc: ARC: [TB10x] Updates for irqchip driver ARC: [plat-arcfpga] Enable arc_emac for ARCAngle4 Board
2013-07-09mm: invoke oom-killer from remaining unconverted page fault handlersJohannes Weiner1-2/+4
A few remaining architectures directly kill the page faulting task in an out of memory situation. This is usually not a good idea since that task might not even use a significant amount of memory and so may not be the optimal victim to resolve the situation. Since 2.6.29's 1c0fe6e ("mm: invoke oom-killer from page fault") there is a hook that architecture page fault handlers are supposed to call to invoke the OOM killer and let it pick the right task to kill. Convert the remaining architectures over to this hook. To have the previous behavior of simply taking out the faulting task the vm.oom_kill_allocating_task sysctl can be set to 1. Signed-off-by: Johannes Weiner <hannes@cmpxchg.org> Reviewed-by: Michal Hocko <mhocko@suse.cz> Cc: KAMEZAWA Hiroyuki <kamezawa.hiroyu@jp.fujitsu.com> Acked-by: David Rientjes <rientjes@google.com> Acked-by: Vineet Gupta <vgupta@synopsys.com> [arch/arc bits] Cc: James Hogan <james.hogan@imgtec.com> Cc: David Howells <dhowells@redhat.com> Cc: Jonas Bonn <jonas@southpole.se> Cc: Chen Liqin <liqin.chen@sunplusct.com> Cc: Lennox Wu <lennox.wu@gmail.com> Cc: Chris Metcalf <cmetcalf@tilera.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2013-07-04Merge branch 'i2c/for-next' of ↵Linus Torvalds2-10/+10
git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux Pull i2c updates from Wolfram Sang: - new drivers: Kontron PLD, Wondermedia VT - mv64xxx driver gained sun4i support and a bigger cleanup - duplicate driver 'intel-mid' removed - added generic device tree binding for sda holding time (and designware driver already uses it) - we tried to allow driver probing with only device tree and no i2c ids, but I had to revert it because of side effects. Needs some rethinking. - driver bugfixes, cleanups... * 'i2c/for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux: (34 commits) i2c-designware: use div_u64 to fix link i2c: Kontron PLD i2c bus driver i2c: iop3xxx: fix build failure after waitqueue changes i2c-designware: make SDA hold time configurable i2c: mv64xxx: Set bus frequency to 100kHz if clock-frequency is not provided i2c: imx: allow autoloading on dt ids i2c: mv64xxx: Fix transfer error code i2c: i801: SMBus patch for Intel Coleto Creek DeviceIDs i2c: omap: correct usage of the interrupt enable register i2c-pxa: prepare clock before use Revert "i2c: core: make it possible to match a pure device tree driver" i2c: nomadik: allocate adapter number dynamically i2c: nomadik: support elder Nomadiks i2c: mv64xxx: Add Allwinner sun4i compatible i2c: mv64xxx: make the registers offset configurable i2c: mv64xxx: Add macros to access parts of registers i2c: vt8500: Add support for I2C bus on Wondermedia SoCs i2c: designware: fix race between subsequent xfers i2c: bfin-twi: Read and write the FIFO in loop i2c: core: make it possible to match a pure device tree driver ...
2013-07-04Merge branch 'kconfig-diet' from Dave HansenLinus Torvalds2-7/+1
Merge Kconfig menu diet patches from Dave Hansen: "I think the "Kernel Hacking" menu has gotten a bit out of hand. It is over 120 lines long on my system with everything enabled and options are scattered around it haphazardly. http://sr71.net/~dave/linux/kconfig-horror.png Let's try to introduce some sanity. This set takes that 120 lines down to 55 and makes it vastly easier to find some things. It's a start. This set stands on its own, but there is plenty of room for follow-up patches. The arch-specific debug options still end up getting stuck in the top-level "kernel hacking" menu. OPTIMIZE_INLINING, for instance, could obviously go in to the "compiler options" menu, but the fact that it is defined in arch/ in a separate Kconfig file keeps it on its own for the moment. The Signed-off-by's in here look funky. I changed employers while working on this set, so I have signoffs from both email addresses" * emailed patches from Dave Hansen <dave@sr71.net>: hang and lockup detection menu kconfig: consolidate printk options group locking debugging options consolidate compilation option configs consolidate runtime testing configs order memory debugging Kconfig options consolidate per-arch stack overflow debugging options
2013-07-04consolidate per-arch stack overflow debugging optionsDave Hansen2-7/+1
Original posting: http://lkml.kernel.org/r/20121214184202.F54094D9@kernel.stglabs.ibm.com Several architectures have similar stack debugging config options. They all pretty much do the same thing, some with slightly differing help text. This patch changes the architectures to instead enable a Kconfig boolean, and then use that boolean in the generic Kconfig.debug to present the actual menu option. This removes a bunch of duplication and adds consistency across arches. Signed-off-by: Dave Hansen <dave@linux.vnet.ibm.com> Reviewed-by: H. Peter Anvin <hpa@zytor.com> Reviewed-by: James Hogan <james.hogan@imgtec.com> Acked-by: Chris Metcalf <cmetcalf@tilera.com> [for tile] Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2013-07-03Merge branch 'akpm' (updates from Andrew Morton)Linus Torvalds1-36/+6
Merge first patch-bomb from Andrew Morton: - various misc bits - I'm been patchmonkeying ocfs2 for a while, as Joel and Mark have been distracted. There has been quite a bit of activity. - About half the MM queue - Some backlight bits - Various lib/ updates - checkpatch updates - zillions more little rtc patches - ptrace - signals - exec - procfs - rapidio - nbd - aoe - pps - memstick - tools/testing/selftests updates * emailed patches from Andrew Morton <akpm@linux-foundation.org>: (445 commits) tools/testing/selftests: don't assume the x bit is set on scripts selftests: add .gitignore for kcmp selftests: fix clean target in kcmp Makefile selftests: add .gitignore for vm selftests: add hugetlbfstest self-test: fix make clean selftests: exit 1 on failure kernel/resource.c: remove the unneeded assignment in function __find_resource aio: fix wrong comment in aio_complete() drivers/w1/slaves/w1_ds2408.c: add magic sequence to disable P0 test mode drivers/memstick/host/r592.c: convert to module_pci_driver drivers/memstick/host/jmb38x_ms: convert to module_pci_driver pps-gpio: add device-tree binding and support drivers/pps/clients/pps-gpio.c: convert to module_platform_driver drivers/pps/clients/pps-gpio.c: convert to devm_* helpers drivers/parport/share.c: use kzalloc Documentation/accounting/getdelays.c: avoid strncpy in accounting tool aoe: update internal version number to v83 aoe: update copyright date aoe: perform I/O completions in parallel ...
2013-07-03mm/ARC: prepare for removing num_physpages and simplify mem_init()Jiang Liu1-33/+3
Prepare for removing num_physpages and simplify mem_init(). Signed-off-by: Jiang Liu <jiang.liu@huawei.com> Acked-by: Vineet Gupta <vgupta@synopsys.com> # for arch/arc Cc: James Hogan <james.hogan@imgtec.com> Cc: Rob Herring <rob.herring@calxeda.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2013-07-03mm: concentrate modification of totalram_pages into the mm coreJiang Liu1-1/+1
Concentrate code to modify totalram_pages into the mm core, so the arch memory initialized code doesn't need to take care of it. With these changes applied, only following functions from mm core modify global variable totalram_pages: free_bootmem_late(), free_all_bootmem(), free_all_bootmem_node(), adjust_managed_page_count(). With this patch applied, it will be much more easier for us to keep totalram_pages and zone->managed_pages in consistence. Signed-off-by: Jiang Liu <jiang.liu@huawei.com> Acked-by: David Howells <dhowells@redhat.com> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: "Michael S. Tsirkin" <mst@redhat.com> Cc: <sworddragon2@aol.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Chris Metcalf <cmetcalf@tilera.com> Cc: Geert Uytterhoeven <geert@linux-m68k.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: Jeremy Fitzhardinge <jeremy@goop.org> Cc: Jianguo Wu <wujianguo@huawei.com> Cc: Joonsoo Kim <js1304@gmail.com> Cc: Kamezawa Hiroyuki <kamezawa.hiroyu@jp.fujitsu.com> Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Cc: Marek Szyprowski <m.szyprowski@samsung.com> Cc: Mel Gorman <mel@csn.ul.ie> Cc: Michel Lespinasse <walken@google.com> Cc: Minchan Kim <minchan@kernel.org> Cc: Rik van Riel <riel@redhat.com> Cc: Rusty Russell <rusty@rustcorp.com.au> Cc: Tang Chen <tangchen@cn.fujitsu.com> Cc: Tejun Heo <tj@kernel.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Wen Congyang <wency@cn.fujitsu.com> Cc: Will Deacon <will.deacon@arm.com> Cc: Yasuaki Ishimatsu <isimatu.yasuaki@jp.fujitsu.com> Cc: Yinghai Lu <yinghai@kernel.org> Cc: Russell King <rmk@arm.linux.org.uk> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2013-07-03mm: enhance free_reserved_area() to support poisoning memory with zeroJiang Liu1-2/+2
Address more review comments from last round of code review. 1) Enhance free_reserved_area() to support poisoning freed memory with pattern '0'. This could be used to get rid of poison_init_mem() on ARM64. 2) A previous patch has disabled memory poison for initmem on s390 by mistake, so restore to the original behavior. 3) Remove redundant PAGE_ALIGN() when calling free_reserved_area(). Signed-off-by: Jiang Liu <jiang.liu@huawei.com> Cc: Geert Uytterhoeven <geert@linux-m68k.org> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: "Michael S. Tsirkin" <mst@redhat.com> Cc: <sworddragon2@aol.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Chris Metcalf <cmetcalf@tilera.com> Cc: David Howells <dhowells@redhat.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: Jeremy Fitzhardinge <jeremy@goop.org> Cc: Jianguo Wu <wujianguo@huawei.com> Cc: Joonsoo Kim <js1304@gmail.com> Cc: Kamezawa Hiroyuki <kamezawa.hiroyu@jp.fujitsu.com> Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Cc: Marek Szyprowski <m.szyprowski@samsung.com> Cc: Mel Gorman <mel@csn.ul.ie> Cc: Michel Lespinasse <walken@google.com> Cc: Minchan Kim <minchan@kernel.org> Cc: Rik van Riel <riel@redhat.com> Cc: Rusty Russell <rusty@rustcorp.com.au> Cc: Tang Chen <tangchen@cn.fujitsu.com> Cc: Tejun Heo <tj@kernel.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Wen Congyang <wency@cn.fujitsu.com> Cc: Will Deacon <will.deacon@arm.com> Cc: Yasuaki Ishimatsu <isimatu.yasuaki@jp.fujitsu.com> Cc: Yinghai Lu <yinghai@kernel.org> Cc: Russell King <rmk@arm.linux.org.uk> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2013-07-03mm: change signature of free_reserved_area() to fix building warningsJiang Liu1-1/+1
Change signature of free_reserved_area() according to Russell King's suggestion to fix following build warnings: arch/arm/mm/init.c: In function 'mem_init': arch/arm/mm/init.c:603:2: warning: passing argument 1 of 'free_reserved_area' makes integer from pointer without a cast [enabled by default] free_reserved_area(__va(PHYS_PFN_OFFSET), swapper_pg_dir, 0, NULL); ^ In file included from include/linux/mman.h:4:0, from arch/arm/mm/init.c:15: include/linux/mm.h:1301:22: note: expected 'long unsigned int' but argument is of type 'void *' extern unsigned long free_reserved_area(unsigned long start, unsigned long end, mm/page_alloc.c: In function 'free_reserved_area': >> mm/page_alloc.c:5134:3: warning: passing argument 1 of 'virt_to_phys' makes pointer from integer without a cast [enabled by default] In file included from arch/mips/include/asm/page.h:49:0, from include/linux/mmzone.h:20, from include/linux/gfp.h:4, from include/linux/mm.h:8, from mm/page_alloc.c:18: arch/mips/include/asm/io.h:119:29: note: expected 'const volatile void *' but argument is of type 'long unsigned int' mm/page_alloc.c: In function 'free_area_init_nodes': mm/page_alloc.c:5030:34: warning: array subscript is below array bounds [-Warray-bounds] Also address some minor code review comments. Signed-off-by: Jiang Liu <jiang.liu@huawei.com> Reported-by: Arnd Bergmann <arnd@arndb.de> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: "Michael S. Tsirkin" <mst@redhat.com> Cc: <sworddragon2@aol.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Chris Metcalf <cmetcalf@tilera.com> Cc: David Howells <dhowells@redhat.com> Cc: Geert Uytterhoeven <geert@linux-m68k.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: Jeremy Fitzhardinge <jeremy@goop.org> Cc: Jianguo Wu <wujianguo@huawei.com> Cc: Joonsoo Kim <js1304@gmail.com> Cc: Kamezawa Hiroyuki <kamezawa.hiroyu@jp.fujitsu.com> Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Cc: Marek Szyprowski <m.szyprowski@samsung.com> Cc: Mel Gorman <mel@csn.ul.ie> Cc: Michel Lespinasse <walken@google.com> Cc: Minchan Kim <minchan@kernel.org> Cc: Rik van Riel <riel@redhat.com> Cc: Rusty Russell <rusty@rustcorp.com.au> Cc: Tang Chen <tangchen@cn.fujitsu.com> Cc: Tejun Heo <tj@kernel.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Wen Congyang <wency@cn.fujitsu.com> Cc: Will Deacon <will.deacon@arm.com> Cc: Yasuaki Ishimatsu <isimatu.yasuaki@jp.fujitsu.com> Cc: Yinghai Lu <yinghai@kernel.org> Cc: Russell King <rmk@arm.linux.org.uk> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2013-07-03Merge tag 'arc-v3.11-rc1-part1' of ↵Linus Torvalds48-876/+670
git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc Pull first batch of ARC changes from Vineet Gupta: "There's a second bunch to follow next week - which depends on commits on other trees (irq/net). I'd have preferred the accompanying ARC change via respective trees, but it didn't workout somehow. Highlights of changes: - Continuation of ARC MM changes from 3.10 including zero page optimization Setting pagecache pages dirty by default Non executable stack by default Reducing dcache flushes for aliasing VIPT config - Long overdue rework of pt_regs machinery - removing the unused word gutters and adding ECR register to baseline (helps cleanup lot of low level code) - Support for ARC gcc 4.8 - Few other preventive fixes, cosmetics, usage of Kconfig helper.. The diffstat is larger than normal primarily because of arcregs.h header split as well as beautification of macros in entry.h" * tag 'arc-v3.11-rc1-part1' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc: (32 commits) ARC: warn on improper stack unwind FDE entries arc: delete __cpuinit usage from all arc files ARC: [tlb-miss] Fix bug with CONFIG_ARC_DBG_TLB_MISS_COUNT ARC: [tlb-miss] Extraneous PTE bit testing/setting ARC: Adjustments for gcc 4.8 ARC: Setup Vector Table Base in early boot ARC: Remove explicit passing around of ECR ARC: pt_regs update #5: Use real ECR for pt_regs->event vs. synth values ARC: stop using pt_regs->orig_r8 ARC: pt_regs update #4: r25 saved/restored unconditionally ARC: K/U SP saved from one location in stack switching macro ARC: Entry Handler tweaks: Simplify branch for in-kernel preemption ARC: Entry Handler tweaks: Avoid hardcoded LIMMS for ECR values ARC: Increase readability of entry handlers ARC: pt_regs update #3: Remove unused gutter at start of callee_regs ARC: pt_regs update #2: Remove unused gutter at start of pt_regs ARC: pt_regs update #1: Align pt_regs end with end of kernel stack page ARC: pt_regs update #0: remove kernel stack canary ARC: [mm] Remove @write argument to do_page_fault() ARC: [mm] Make stack/heap Non-executable by default ...
2013-06-29more open-coded file_inode() callsAl Viro1-1/+1
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2013-06-29consolidate io_remap_pfn_range definitionsAl Viro1-3/+0
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2013-06-28ARC: [TB10x] Updates for irqchip driverChristian Ruppert4-54/+43
Device tree and Kconfig updates for irqchip driver. Signed-off-by: Christian Ruppert <christian.ruppert@abilis.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-06-28ARC: [plat-arcfpga] Enable arc_emac for ARCAngle4 BoardAlexey Brodkin4-4/+19
* Add arc_emac to DeviceTree DT description "Documentation/devicetree/bindings/net/arc_emac.txt". * Update defconfig correspondingly [vgupta: tweaked changelog] Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-06-27ARC: warn on improper stack unwind FDE entriesVineet Gupta1-0/+2
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-06-27arc: delete __cpuinit usage from all arc filesPaul Gortmaker7-16/+16
The __cpuinit type of throwaway sections might have made sense some time ago when RAM was more constrained, but now the savings do not offset the cost and complications. For example, the fix in commit 5e427ec2d0 ("x86: Fix bit corruption at CPU resume time") is a good example of the nasty type of bugs that can be created with improper use of the various __init prefixes. After a discussion on LKML[1] it was decided that cpuinit should go the way of devinit and be phased out. Once all the users are gone, we can then finally remove the macros themselves from linux/init.h. Note that some harmless section mismatch warnings may result, since notify_cpu_starting() and cpu_up() are arch independent (kernel/cpu.c) are flagged as __cpuinit -- so if we remove the __cpuinit from arch specific callers, we will also get section mismatch warnings. As an intermediate step, we intend to turn the linux/init.h cpuinit content into no-ops as early as possible, since that will get rid of these warnings. In any case, they are temporary and harmless. This removes all the arch/arc uses of the __cpuinit macros from all C files. Currently arc does not have any __CPUINIT used in assembly files. [1] https://lkml.org/lkml/2013/5/20/589 Cc: Vineet Gupta <vgupta@synopsys.com> Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-06-27ARC: [tlb-miss] Fix bug with CONFIG_ARC_DBG_TLB_MISS_COUNTVineet Gupta1-5/+5
LOAD_FAULT_PTE macro is expected to set r2 with faulting vaddr. However in case of CONFIG_ARC_DBG_TLB_MISS_COUNT, it was getting clobbered with statistics collection code. Fix latter by using a different register. Note that only I-TLB Miss handler was potentially affected. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-06-27ARC: [tlb-miss] Extraneous PTE bit testing/settingVineet Gupta1-5/+5
* No need to check for READ access in I-TLB Miss handler * Redundant PAGE_PRESENT update in PTE Post TLB entry installation, in updating PTE for software accessed/dity bits, no need to update PAGE_PRESENT since it will already be set. Infact the entry won't have installed if !PAGE_PRESENT. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-06-27ARC: Adjustments for gcc 4.8Vineet Gupta5-19/+35
* DWARF unwinder related + Force DWARF2 compliant .debug_frame (gcc 4.8 defaults to DWARF4 which kernel unwinder can't grok). + Discard the additional .eh_frame generated + Discard the dwarf4 debug info generated by -gdwarf-2 for normal no debug case * 4.8 already uses arc600 multilibs for -mno-mpy * switch to using uclibc compiler (to get -mmedium-calls and -mno-sdata) and also since buildroot can only use 1 toolchain Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-06-26i2c-designware: make SDA hold time configurableChristian Ruppert2-10/+10
This patch makes the SDA hold time configurable through device tree. Signed-off-by: Christian Ruppert <christian.ruppert@abilis.com> Signed-off-by: Pierrick Hascoet <pierrick.hascoet@abilis.com> Acked-by: Vineet Gupta <vgupta@synopsys.com> for arch/arc bits Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2013-06-26ARC: Setup Vector Table Base in early bootVineet Gupta2-2/+2
Otherwise early boot exceptions such as instructions errors due to configuration mismatch between kernel and hardware go off to la-la land, as opposed to hitting the handler and panic()'ing properly. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-06-26ARC: Remove explicit passing around of ECRVineet Gupta13-78/+59
With ECR now part of pt_regs * No need to propagate from lowest asm handlers as arg * No need to save it in tsk->thread.cause_code * Avoid bit chopping to access the bit-fields More code consolidation, cleanup Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-06-26ARC: pt_regs update #5: Use real ECR for pt_regs->event vs. synth valuesVineet Gupta8-57/+53
pt_regs->event was set with artificial values to identify the low level system event (syscall trap / breakpoint trap / exceptions / interrupts) With r8 saving out of the way, the full word can be used to save real ECR (Exception Cause Register) which helps idenify the event naturally, including additional info such as cause code, param. Only for Interrupts, where ECR is not applicable, do we resort to synthetic non ECR values. SAVE_ALL_TRAP/EXCEPTIONS can now be merged as they both use ECR with different runtime values. The ptrace helpers now use the sub-fields of ECR to distinguish the events (e.g. vector 0x25 is trap, param 0 is syscall...) The following benefits will follow: (1) This centralizes the location of where ECR is saved and will allow the cleanup of task->thread.cause_code ECR placeholder which is set in non-uniform way. Then ARC VM code can safely rely on it being there for purpose of finer grained VM_EXEC dcache flush (based on exec fault: I-TLB Miss) (2) Further, ECR being passed around from low level handlers as arg can be eliminated as it is part of standard reg-file in pt_regs Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-06-22ARC: stop using pt_regs->orig_r8Vineet Gupta3-16/+4
Historically, pt_regs have had orig_r8, an overloaded container for (1) backup copy of r8 (syscall number Trap Exceptions) (2) additional system state: (syscall/Exception/Interrupt) There is no point in keeping (1) since syscall number is never clobbered in-place, in pt_regs, unlike r0 which duals as first syscall arg as well as syscall return value and in case of syscall restart, the orig arg0 needs restoring (from orig_r0) after having been updated in-place with syscall ret value. This further paves way to convert (2) to contain ECR itself (rather than current madeup values) Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-06-22ARC: pt_regs update #4: r25 saved/restored unconditionallyVineet Gupta6-40/+24
(This is a VERY IMP change for low level interrupt/exception handling) ----------------------------------------------------------------------- WHAT ----------------------------------------------------------------------- * User 25 now saved in pt_regs->user_r25 (vs. tsk->thread_info.user_r25) * This allows Low level interrupt code to unconditionally save r25 (vs. the prev version which would only do it for U->K transition). Ofcourse for nested interrupts, only the pt_regs->user_r25 of bottom-most frame is useful. * simplifies the interrupt prologue/epilogue * Needed for ARCv2 ISA code and done here to keep design similar with ARCompact event handling ----------------------------------------------------------------------- WHY ------------------------------------------------------------------------- With CONFIG_ARC_CURR_IN_REG, r25 is used to cache "current" task pointer in kernel mode. So when entering kernel mode from User Mode - user r25 is specially safe-kept (it being a callee reg is NOT part of pt_regs which are saved by default on each interrupt/trap/exception) - r25 loaded with current task pointer. Further, if interrupt was taken in kernel mode, this is skipped since we know that r25 already has valid "current" pointer. With 2 level of interrupts in ARCompact ISA, detecting this is difficult but still possible, since we could be in kernel mode but r25 not already saved (in fact the stack itself might not have been switched). A. User mode B. L1 IRQ taken C. L2 IRQ taken (while on 1st line of L1 ISR) So in #C, although in kernel mode, r25 not saved (infact SP not switched at all) Given that ARcompact has manual stack switching, we could use a bit of trickey - The low level code would make sure that SP is only set to kernel mode value at the very end (after saving r25). So a non kernel mode SP, even if in kernel mode, meant r25 was NOT saved. The same paradigm won't work in ARCv2 ISA since SP is auto-switched so it's setting can't be delayed/constrained. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-06-22ARC: K/U SP saved from one location in stack switching macroVineet Gupta1-4/+4
This paves way for further simplifications. There's an overhead of 1 insn for the non-common case of interrupt taken from kernel mode. Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-06-22ARC: Entry Handler tweaks: Simplify branch for in-kernel preemptionVineet Gupta1-6/+2
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-06-22ARC: Entry Handler tweaks: Avoid hardcoded LIMMS for ECR valuesVineet Gupta2-6/+14
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2013-06-22ARC: Increase readability of entry handlersVineet Gupta2-212/+186
* use artificial PUSH/POP contructs for CORE Reg save/restore to stack * use artificial PUSHAX/POPAX contructs for Auxiliary Space regs * macro'ize multiple copies of callee-reg-save/restore (SAVE_R13_TO_R24) * use BIC insn for inverse-and operation Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
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