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AgeCommit message (Expand)AuthorFilesLines
2006-03-20[SPARC64]: Sun4v cross-call sending support.David S. Miller4-4/+163
2006-03-20[SPARC64]: Sun4v interrupt handling.David S. Miller6-11/+568
2006-03-20[SPARC64]: Allocate and register the 4 sun4v mondo queues at bootup.David S. Miller2-1/+59
2006-03-20[SPARC64]: Verify all trap_per_cpu assembler offsets in trap_init()David S. Miller1-1/+12
2006-03-20[SPARC64]: Add sun4v mondo queue bases to struct trap_per_cpu.David S. Miller1-8/+15
2006-03-20[SPARC64]: Fix some comment typos in asm/hypervisor.hDavid S. Miller1-2/+4
2006-03-20[SPARC64]: Patch up mmu context register writes for sun4v.David S. Miller9-66/+176
2006-03-20[SPARC64]: Register per-cpu fault status area with sun4v hypervisor.David S. Miller3-4/+29
2006-03-20[SPARC64]: asm/cpudata.h needs asm/asi.hDavid S. Miller1-1/+2
2006-03-20[SPARC64]: Niagara copy/clear page.David S. Miller3-0/+114
2006-03-20[SPARC64]: Rename gl_{1,2}insn_patch --> sun4v_{1,2}insn_patchDavid S. Miller8-32/+35
2006-03-20[SPARC64]: Initial sun4v TLB miss handling infrastructure.David S. Miller8-18/+349
2006-03-20[SPARC64]: Add missing memory barriers to instruction patching functions.David S. Miller1-0/+7
2006-03-20[SPARC64]: Sanitize %pstate writes for sun4v.David S. Miller7-206/+88
2006-03-20[SPARC64]: Kill all %pstate changes in context switch code.David S. Miller2-6/+4
2006-03-20[SPARC64]: Add initial code to twiddle %gl on trap entry/exit.David S. Miller6-3/+62
2006-03-20[SPARC64]: Fill dead cycles on trap entry with real work.David S. Miller1-12/+15
2006-03-20[SPARC64]: Add define for "GL" field of sun4v %tstate register.David S. Miller1-2/+3
2006-03-20[SPARC64]: Add sun4v case to __GET_CPUID() patch tables.David S. Miller2-0/+11
2006-03-20[SPARC64]: Sun4v interrupt queue register definitions.David S. Miller1-0/+15
2006-03-20[SPARC64]: Sun4v scratchpad register layout.David S. Miller1-0/+14
2006-03-20[SPARC64]: Sun4v specific ASI defines.David S. Miller1-0/+9
2006-03-20[SPARC64]: Niagara optimized memcpy() and copy_{to,from}_user().David S. Miller5-0/+474
2006-03-20[SPARC64]: Add Niagara init-store twin-load ASI defines.David S. Miller1-1/+8
2006-03-20[SPARC64]: Add some hypervisor tlb_type checks.David S. Miller2-8/+30
2006-03-20[SPARC64]: Add 'hypervisor' to ultra_tlb_type enumeration.David S. Miller1-0/+1
2006-03-20[SPARC64]: SUN4V hypervisor TLB flush support code.David S. Miller1-10/+214
2006-03-20[SPARC64]: SUN4V hypervisor interface defines.David S. Miller1-0/+2072
2006-03-20[SPARC64]: Refine register window trap handling.David S. Miller7-440/+447
2006-03-20[SPARC64]: Add explicit register args to trap state loading macros.David S. Miller6-71/+64
2006-03-20[SPARC64]: Refine code sequences to get the cpu id.David S. Miller9-134/+144
2006-03-20[SPARC64]: Turn off TSB growing for now.David S. Miller2-15/+1
2006-03-20[SPARC64]: Correctable ECC errors cannot occur at trap level > 0.David S. Miller3-24/+4
2006-03-20[SPARC64]: Access TSB with physical addresses when possible.David S. Miller9-53/+234
2006-03-20[SPARC64]: Kill out-of-date commentary in asm-sparc64/tsb.hDavid S. Miller1-8/+0
2006-03-20[SPARC64]: Don't clobber alt-global %g4 on window fixups.David S. Miller1-1/+1
2006-03-20[SPARC64]: Fix race in LOAD_PER_CPU_BASE()David S. Miller4-13/+18
2006-03-20[SPARC64]: Kill swapper_pgd_zero, totally unused.David S. Miller1-3/+0
2006-03-20[SPARC64]: Fix too early reference to %g6David S. Miller1-2/+5
2006-03-20[SPARC64]: Kill hard-coded %pstate setting in sparc_exit.David S. Miller1-2/+3
2006-03-20[SPARC64]: Increase swapper_tsb size to 32K.David S. Miller4-20/+16
2006-03-20[SPARC64]: Kill sole argument passed to setup_tba().David S. Miller3-10/+4
2006-03-20[SPARC64]: Kill PROM locked TLB entry preservation code.David S. Miller3-296/+10
2006-03-20[SPARC64]: Use sparc64_highest_unlocked_tlb_ent in __tsb_context_switch()David S. Miller1-6/+8
2006-03-20[SPARC64]: Fix bogus flush instruction usage.David S. Miller5-17/+30
2006-03-20[SPARC64]: Fix incorrect TSB lock bit handling.David S. Miller2-3/+4
2006-03-20[SPARC64]: Kill {save,restore}_alternate_globals()David S. Miller2-76/+1
2006-03-20[SPARC64]: Preload TSB entries from update_mmu_cache().David S. Miller3-0/+29
2006-03-20[SPARC64]: Dynamically grow TSB in response to RSS growth.David S. Miller5-10/+184
2006-03-20[SPARC64]: Add infrastructure for dynamic TSB sizing.David S. Miller7-58/+142
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