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author | Richard Genoud <richard.genoud@gmail.com> | 2017-06-01 14:18:26 +0200 |
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committer | Linus Walleij <linus.walleij@linaro.org> | 2017-06-09 09:38:27 +0200 |
commit | fc7a90686777e7d2da7a08cf0202c21f3b96febb (patch) | |
tree | 3da8fd5d68eb64b67e583c2c936ce87db82abe5d /net/ipv6/xfrm6_mode_ro.c | |
parent | c528eb27a3be2600e724c8a57cb69eab1fd9afa2 (diff) |
gpio: mvebu: fix gpio bank registration when pwm is used
If more than one gpio bank has the "pwm" property, only one will be
registered successfully, all the others will fail with:
mvebu-gpio: probe of f1018140.gpio failed with error -17
That's because in alloc_pwms(), the chip->base (aka "int pwm"), was not
set (thus, ==0) ; and 0 is a meaningful start value in alloc_pwm().
What was intended is mvpwm->chip->base = -1.
Like that, the numbering will be done auto-magically
Moreover, as the region might be already occupied by another pwm, we
shouldn't force:
mvpwm->chip->base = 0
nor
mvpwm->chip->base = id * MVEBU_MAX_GPIO_PER_BANK;
Tested on clearfog-pro (Marvell 88F6828)
Fixes: 757642f9a584 ("gpio: mvebu: Add limited PWM support")
Signed-off-by: Richard Genoud <richard.genoud@gmail.com>
Reviewed-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'net/ipv6/xfrm6_mode_ro.c')
0 files changed, 0 insertions, 0 deletions