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authorKonrad Dybcio <konradybcio@gmail.com>2020-07-26 13:12:05 +0200
committerStephen Boyd <sboyd@kernel.org>2020-07-27 15:16:39 -0700
commit3386af51d3bcebcba3f7becdb1ef2e384abe90cf (patch)
treecd83ee70052a2cd30be6d660a646bc564e61a54b /drivers/clk
parentb538304da7855f4e31f91f915f259936eb67a1e6 (diff)
clk: qcom: gcc-sdm660: Fix up gcc_mss_mnoc_bimc_axi_clk
Add missing halt_check, hwcg_reg and hwcg_bit properties. These were likely omitted when porting the driver upstream. Signed-off-by: Konrad Dybcio <konradybcio@gmail.com> Link: https://lore.kernel.org/r/20200726111215.22361-9-konradybcio@gmail.com Fixes: f2a76a2955c0 ("clk: qcom: Add Global Clock controller (GCC) driver for SDM660") Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk')
-rw-r--r--drivers/clk/qcom/gcc-sdm660.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/clk/qcom/gcc-sdm660.c b/drivers/clk/qcom/gcc-sdm660.c
index a85283786278..f0b47b7d50ca 100644
--- a/drivers/clk/qcom/gcc-sdm660.c
+++ b/drivers/clk/qcom/gcc-sdm660.c
@@ -1715,6 +1715,9 @@ static struct clk_branch gcc_mss_cfg_ahb_clk = {
static struct clk_branch gcc_mss_mnoc_bimc_axi_clk = {
.halt_reg = 0x8a004,
+ .halt_check = BRANCH_HALT,
+ .hwcg_reg = 0x8a004,
+ .hwcg_bit = 1,
.clkr = {
.enable_reg = 0x8a004,
.enable_mask = BIT(0),