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author | Linus Torvalds <torvalds@linux-foundation.org> | 2008-07-28 08:41:13 -0700 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2008-07-28 08:41:13 -0700 |
commit | b10a8b7238d7b034f28d32a85bb05c48475f132a (patch) | |
tree | 8e70e816757c2a517de6fb721dd9ac2276619c26 /arch/sh/kernel/cpu/sh4/probe.c | |
parent | 37eaf8c7463e53cf1acf025fb566fb6c4573297f (diff) | |
parent | 8b2224dc6a5b46cfa1d54ab1fe82107351c66443 (diff) |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: (72 commits)
sh: SuperH Mobile CEU and camera platform data for AP325RXA
sh: Update smc911x platform data for AP325RXA
sh: SuperH Mobile LCDC platform data for AP325RXA
sh: Add SuperH Mobile CEU platform data for Migo-R
sh: Add SuperH Mobile LCDC platform data for Migo-R
sh: Move asid_cache() out of ifdef to fix SH-3/4 nommu build.
sh: Workaround for __put_user_asm() bug with gcc 4.x on big-endian.
sh: Wire up new syscalls.
sh: fix uImage Entry Point
sh_keysc: remove request_mem_region() and release_mem_region()
sh: Don't miss pending signals returning to user mode after signal processing
sh: Use clk_always_enable() on sh7366
sh: Use clk_always_enable() on sh7343 / SE77343
sh: Use clk_always_enable() on sh7722 / Migo-R / SE7722
sh: Use clk_always_enable() on sh7723 / ap325rxa
sh: Introduce clk_always_enable() function
sh: Show all clocks and their state in /proc/clocks
sh: Merge sh7343 and sh7722 clock code
sh: Add SuperH Mobile MSTPCR bits to clock framework
sh: Use arch_flags to simplify sh7722 siu clock code
...
Diffstat (limited to 'arch/sh/kernel/cpu/sh4/probe.c')
-rw-r--r-- | arch/sh/kernel/cpu/sh4/probe.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/arch/sh/kernel/cpu/sh4/probe.c b/arch/sh/kernel/cpu/sh4/probe.c index be4926969181..2e42572b1b11 100644 --- a/arch/sh/kernel/cpu/sh4/probe.c +++ b/arch/sh/kernel/cpu/sh4/probe.c @@ -50,14 +50,18 @@ int __init detect_cpu_and_cache_system(void) boot_cpu_data.dcache.ways = 1; boot_cpu_data.dcache.linesz = L1_CACHE_BYTES; + /* We don't know the chip cut */ + boot_cpu_data.cut_major = boot_cpu_data.cut_minor = -1; + /* * Setup some generic flags we can probe on SH-4A parts */ - if (((pvr >> 24) & 0xff) == 0x10) { + if (((pvr >> 16) & 0xff) == 0x10) { if ((cvr & 0x10000000) == 0) boot_cpu_data.flags |= CPU_HAS_DSP; boot_cpu_data.flags |= CPU_HAS_LLSC; + boot_cpu_data.cut_major = pvr & 0x7f; } /* FPU detection works for everyone */ |