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authorZubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com>2016-08-12 12:48:52 +0100
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2016-08-31 15:45:18 +0200
commit549ce8f134bd95a1d4bf1a62215a62f1e9408a96 (patch)
tree13e9a4374d559c315c1626b840a13d0243102ca4
parentaeb83d7054de0180c4f4b8df7d5c75cc60277558 (diff)
misc: pch_phub: Read prefetch value from device tree if passed
The default prefetch value for the eg20t device is hard coded to 0x000affaa. Add support for an alternative to be read from DT if available Signed-off-by: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-rw-r--r--drivers/misc/pch_phub.c9
1 files changed, 8 insertions, 1 deletions
diff --git a/drivers/misc/pch_phub.c b/drivers/misc/pch_phub.c
index 4810e039bbec..1dd18f500730 100644
--- a/drivers/misc/pch_phub.c
+++ b/drivers/misc/pch_phub.c
@@ -28,6 +28,7 @@
#include <linux/if_ether.h>
#include <linux/ctype.h>
#include <linux/dmi.h>
+#include <linux/of.h>
#define PHUB_STATUS 0x00 /* Status Register offset */
#define PHUB_CONTROL 0x04 /* Control Register offset */
@@ -711,6 +712,12 @@ static int pch_phub_probe(struct pci_dev *pdev,
if (id->driver_data == 1) { /* EG20T PCH */
const char *board_name;
+ unsigned int prefetch = 0x000affaa;
+
+ if (pdev->dev.of_node)
+ of_property_read_u32(pdev->dev.of_node,
+ "intel,eg20t-prefetch",
+ &prefetch);
ret = sysfs_create_file(&pdev->dev.kobj,
&dev_attr_pch_mac.attr);
@@ -736,7 +743,7 @@ static int pch_phub_probe(struct pci_dev *pdev,
CLKCFG_UART_MASK);
/* set the prefech value */
- iowrite32(0x000affaa, chip->pch_phub_base_address + 0x14);
+ iowrite32(prefetch, chip->pch_phub_base_address + 0x14);
/* set the interrupt delay value */
iowrite32(0x25, chip->pch_phub_base_address + 0x44);
chip->pch_opt_rom_start_address = PCH_PHUB_ROM_START_ADDR_EG20T;