diff options
| author | Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com> | 2024-08-27 19:43:56 +0530 |
|---|---|---|
| committer | Matt Roper <matthew.d.roper@intel.com> | 2024-10-09 10:02:24 -0700 |
| commit | 388629a219ace83a09f8431a2e709c6c2efcf6ee (patch) | |
| tree | 10d93eea519e0dcae3eb8698321cc7c6b87fc183 | |
| parent | 87aaea1234af6bf96603f41b921aa281189bf02a (diff) | |
drm/i915/mtl: Update PLL c20 phy value for DP uhbr20drm-intel-next-2024-10-11
Update mtl c20 phy DP table for uhbr20 values according to the revised
specifications.
Bspec: 74165
Signed-off-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>
Reviewed-by: Sai Teja Pottumuttu <sai.teja.pottumuttu@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240827141356.3024760-1-dnyaneshwar.bhadane@intel.com
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_cx0_phy.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c b/drivers/gpu/drm/i915/display/intel_cx0_phy.c index 4a6c3040ca15..f73d576fd99e 100644 --- a/drivers/gpu/drm/i915/display/intel_cx0_phy.c +++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.c @@ -923,10 +923,10 @@ static const struct intel_c20pll_state mtl_c20_dp_uhbr20 = { }, .mplla = { 0x3104, /* mplla cfg0 */ 0xd105, /* mplla cfg1 */ - 0xc025, /* mplla cfg2 */ - 0xc025, /* mplla cfg3 */ - 0xa6ab, /* mplla cfg4 */ - 0x8c00, /* mplla cfg5 */ + 0x9217, /* mplla cfg2 */ + 0x9217, /* mplla cfg3 */ + 0x8c00, /* mplla cfg4 */ + 0x759a, /* mplla cfg5 */ 0x4000, /* mplla cfg6 */ 0x0003, /* mplla cfg7 */ 0x3555, /* mplla cfg8 */ |