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authorRuiling Song <ruiling.song@intel.com>2014-07-30 13:59:29 +0800
committerZhigang Gong <zhigang.gong@intel.com>2014-09-05 17:39:58 +0800
commit21d184b0b21e209d3d2ebcf6baf54b10e0240064 (patch)
tree4a8c13c6035432b01ebae03490272baef8dba515 /COPYING
parent806f01c744dac57852ae2a17fff8eeadf105d84c (diff)
GBE: Refine bti usage in backend & runtime.
Previously, we simply map 2G surface for memory access, which has obvious security issue, user can easily read/write graphics memory that does not belong to him. To prevent such kind of behaviour, We bind each surface to a dedicated bti. HW provides automatic bounds check. For out-of-bound write, it will be ignored. And for read out-of-bound, hardware will simply return zero value. The idea behind the patch is for a load/store instruction, it will search through the LLVM use-def chain until finding out where the address comes from. Then the bti is saved in ir::Instruction and used for the later code generation. And for mixed pointer case, a load/store will access more than one bti. To simplify some code, '0' is reserved for constant address space, '1' is reserved for private address space. Other btis are assigned automatically by backend. Signed-off-by: Ruiling Song <ruiling.song@intel.com> Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>
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