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authorClint Taylor <clinton.a.taylor@intel.com>2015-04-09 13:42:06 -0700
committerJani Nikula <jani.nikula@intel.com>2015-04-10 14:30:35 +0300
commitaf8fcb9c58f1b2f02ddc04ba64710aaa52da00db (patch)
tree243d374078c84350b28d4324eff94cd62980046a /mm/hugetlb.c
parent88f933a8b03474ebcd16935d3620e5c10b557f6f (diff)
drm/i915/chv: Remove DPIO force latency causing interpair skew issue
Latest version of the "CHV DPIO programming notes" no longer requires writes to TX DW 11 to fix a +2UI interpair skew issue. The current code from April 2014 was actually causing additional skew issues between all TMDS pairs. ver2: added same treatment to intel_dp.c based on Ville's testing. Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Tested-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Clint Taylor <clinton.a.taylor@intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
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