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authormalc <av1474@comtv.ru>2009-10-01 22:20:47 +0400
committermalc <av1474@comtv.ru>2009-10-01 22:45:02 +0400
commit99a0949b720a0936da2052cb9a46db04ffc6db29 (patch)
treef9e39633853e35b49fc4465337cc196b9650866e /cpu-defs.h
parentbc6291a1b95a2c4c546fde6e5cb4c68366f06649 (diff)
Get rid of _t suffix
Some not so obvious bits, slirp and Xen were left alone for the time being. Signed-off-by: malc <av1474@comtv.ru>
Diffstat (limited to 'cpu-defs.h')
-rw-r--r--cpu-defs.h10
1 files changed, 5 insertions, 5 deletions
diff --git a/cpu-defs.h b/cpu-defs.h
index 95068b530..a48fb0213 100644
--- a/cpu-defs.h
+++ b/cpu-defs.h
@@ -95,15 +95,15 @@ typedef struct CPUTLBEntry {
use the corresponding iotlb value. */
#if TARGET_PHYS_ADDR_BITS == 64
/* on i386 Linux make sure it is aligned */
- target_phys_addr_t addend __attribute__((aligned(8)));
+ a_target_phys_addr addend __attribute__((aligned(8)));
#else
- target_phys_addr_t addend;
+ a_target_phys_addr addend;
#endif
/* padding to get a power of two size */
uint8_t dummy[(1 << CPU_TLB_ENTRY_BITS) -
(sizeof(target_ulong) * 3 +
- ((-sizeof(target_ulong) * 3) & (sizeof(target_phys_addr_t) - 1)) +
- sizeof(target_phys_addr_t))];
+ ((-sizeof(target_ulong) * 3) & (sizeof(a_target_phys_addr) - 1)) +
+ sizeof(a_target_phys_addr))];
} CPUTLBEntry;
#ifdef HOST_WORDS_BIGENDIAN
@@ -152,7 +152,7 @@ typedef struct CPUWatchpoint {
volatile sig_atomic_t exit_request; \
/* The meaning of the MMU modes is defined in the target code. */ \
CPUTLBEntry tlb_table[NB_MMU_MODES][CPU_TLB_SIZE]; \
- target_phys_addr_t iotlb[NB_MMU_MODES][CPU_TLB_SIZE]; \
+ a_target_phys_addr iotlb[NB_MMU_MODES][CPU_TLB_SIZE]; \
struct TranslationBlock *tb_jmp_cache[TB_JMP_CACHE_SIZE]; \
/* buffer for temporaries in the code generator */ \
long temp_buf[CPU_TEMP_BUF_NLONGS]; \