diff options
author | Xiang, Haihao <haihao.xiang@intel.com> | 2013-09-11 11:05:03 +0800 |
---|---|---|
committer | Xiang, Haihao <haihao.xiang@intel.com> | 2013-09-13 13:43:20 +0800 |
commit | 6ce827df0a9d6cb841308813ec54a019e3c63d37 (patch) | |
tree | d0ca6bac888d78d564778897074cc709bdab5bb1 | |
parent | 4faf6bf47f8e4e2fe587e3bb6a004340edd59c4c (diff) |
VPP: move the BO for STMM into sub-contexts
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
-rwxr-xr-x | src/i965_post_processing.c | 65 | ||||
-rwxr-xr-x | src/i965_post_processing.h | 6 |
2 files changed, 36 insertions, 35 deletions
diff --git a/src/i965_post_processing.c b/src/i965_post_processing.c index e5c023c..c009307 100755 --- a/src/i965_post_processing.c +++ b/src/i965_post_processing.c @@ -3287,12 +3287,12 @@ pp_nv12_dndi_initialize(VADriverContextP ctx, struct i965_post_processing_contex w = obj_surface->width; h = obj_surface->height; - if (pp_context->stmm.bo == NULL) { - pp_context->stmm.bo = dri_bo_alloc(i965->intel.bufmgr, - "STMM surface", - w * h, - 4096); - assert(pp_context->stmm.bo); + if (pp_dndi_context->stmm_bo == NULL) { + pp_dndi_context->stmm_bo = dri_bo_alloc(i965->intel.bufmgr, + "STMM surface", + w * h, + 4096); + assert(pp_dndi_context->stmm_bo); } /* source UV surface index 2 */ @@ -3311,7 +3311,7 @@ pp_nv12_dndi_initialize(VADriverContextP ctx, struct i965_post_processing_contex /* source STMM surface index 20 */ i965_pp_set_surface_state(ctx, pp_context, - pp_context->stmm.bo, 0, + pp_dndi_context->stmm_bo, 0, orig_w, orig_h, w, I965_SURFACEFORMAT_R8_UNORM, 20, 1); @@ -3494,12 +3494,12 @@ pp_nv12_dn_initialize(VADriverContextP ctx, struct i965_post_processing_context w = obj_surface->width; h = obj_surface->height; - if (pp_context->stmm.bo == NULL) { - pp_context->stmm.bo = dri_bo_alloc(i965->intel.bufmgr, - "STMM surface", - w * h, - 4096); - assert(pp_context->stmm.bo); + if (pp_dn_context->stmm_bo == NULL) { + pp_dn_context->stmm_bo = dri_bo_alloc(i965->intel.bufmgr, + "STMM surface", + w * h, + 4096); + assert(pp_dn_context->stmm_bo); } /* source UV surface index 2 */ @@ -3518,7 +3518,7 @@ pp_nv12_dn_initialize(VADriverContextP ctx, struct i965_post_processing_context /* source STMM surface index 20 */ i965_pp_set_surface_state(ctx, pp_context, - pp_context->stmm.bo, 0, + pp_dn_context->stmm_bo, 0, orig_w, orig_h, w, I965_SURFACEFORMAT_R8_UNORM, 20, 1); @@ -3686,12 +3686,12 @@ gen7_pp_nv12_dndi_initialize(VADriverContextP ctx, struct i965_post_processing_c w = obj_surface->width; h = obj_surface->height; - if (pp_context->stmm.bo == NULL) { - pp_context->stmm.bo = dri_bo_alloc(i965->intel.bufmgr, - "STMM surface", - w * h, - 4096); - assert(pp_context->stmm.bo); + if (pp_dndi_context->stmm_bo == NULL) { + pp_dndi_context->stmm_bo = dri_bo_alloc(i965->intel.bufmgr, + "STMM surface", + w * h, + 4096); + assert(pp_dndi_context->stmm_bo); } /* source UV surface index 1 */ @@ -3718,7 +3718,7 @@ gen7_pp_nv12_dndi_initialize(VADriverContextP ctx, struct i965_post_processing_c /* STMM / History Statistics input surface, index 5 */ gen7_pp_set_surface_state(ctx, pp_context, - pp_context->stmm.bo, 0, + pp_dndi_context->stmm_bo, 0, orig_w, orig_h, w, I965_SURFACEFORMAT_R8_UNORM, 5, 1); @@ -3755,7 +3755,7 @@ gen7_pp_nv12_dndi_initialize(VADriverContextP ctx, struct i965_post_processing_c /* STMM output surface, index 33 */ gen7_pp_set_surface_state(ctx, pp_context, - pp_context->stmm.bo, 0, + pp_dndi_context->stmm_bo, 0, orig_w, orig_h, w, I965_SURFACEFORMAT_R8_UNORM, 33, 1); @@ -3933,12 +3933,12 @@ gen7_pp_nv12_dn_initialize(VADriverContextP ctx, struct i965_post_processing_con w = obj_surface->width; h = obj_surface->height; - if (pp_context->stmm.bo == NULL) { - pp_context->stmm.bo = dri_bo_alloc(i965->intel.bufmgr, - "STMM surface", - w * h, - 4096); - assert(pp_context->stmm.bo); + if (pp_dn_context->stmm_bo == NULL) { + pp_dn_context->stmm_bo= dri_bo_alloc(i965->intel.bufmgr, + "STMM surface", + w * h, + 4096); + assert(pp_dn_context->stmm_bo); } /* source UV surface index 1 */ @@ -3965,7 +3965,7 @@ gen7_pp_nv12_dn_initialize(VADriverContextP ctx, struct i965_post_processing_con /* STMM / History Statistics input surface, index 5 */ gen7_pp_set_surface_state(ctx, pp_context, - pp_context->stmm.bo, 0, + pp_dn_context->stmm_bo, 0, orig_w, orig_h, w, I965_SURFACEFORMAT_R8_UNORM, 33, 1); @@ -5424,8 +5424,11 @@ i965_post_processing_context_finalize(struct i965_post_processing_context *pp_co dri_bo_unreference(pp_context->vfe_state.bo); pp_context->vfe_state.bo = NULL; - dri_bo_unreference(pp_context->stmm.bo); - pp_context->stmm.bo = NULL; + dri_bo_unreference(pp_context->pp_dndi_context.stmm_bo); + pp_context->pp_dndi_context.stmm_bo = NULL; + + dri_bo_unreference(pp_context->pp_dn_context.stmm_bo); + pp_context->pp_dn_context.stmm_bo = NULL; for (i = 0; i < NUM_PP_MODULES; i++) { struct pp_module *pp_module = &pp_context->pp_modules[i]; diff --git a/src/i965_post_processing.h b/src/i965_post_processing.h index 0852226..9cdd5fb 100755 --- a/src/i965_post_processing.h +++ b/src/i965_post_processing.h @@ -95,12 +95,14 @@ struct pp_dndi_context { int dest_w; int dest_h; + dri_bo *stmm_bo; }; struct pp_dn_context { int dest_w; int dest_h; + dri_bo *stmm_bo; }; struct pp_blending_context @@ -485,10 +487,6 @@ struct i965_post_processing_context unsigned int size_cs_entry; } urb; - struct { - dri_bo *bo; - } stmm; - struct pp_load_save_context pp_load_save_context; struct pp_scaling_context pp_scaling_context; struct pp_avs_context pp_avs_context; |