R600: Don't emit empty then clause and use alu_pop_after

4 files changed, 50 insertions, 13 deletions

diff --git a/lib/Target/R600/AMDILCFGStructurizer.cpp b/lib/Target/R600/AMDILCFGStructurizer.cpp
index b0cd0f9756..d82c616c59 100644
--- a/lib/Target/R600/AMDILCFGStructurizer.cpp
+++ b/lib/Target/R600/AMDILCFGStructurizer.cpp
@@ -12,6 +12,7 @@
 #define DEBUG_TYPE "structcfg"
 
 #include "AMDGPUInstrInfo.h"
+#include "R600InstrInfo.h"
 #include "AMDIL.h"
 #include "llvm/ADT/SCCIterator.h"
 #include "llvm/ADT/SmallVector.h"
@@ -672,7 +673,6 @@ int CFGStructurizer<PassT>::ifPatternMatch(BlockT *curBlk) {
   if (branchInstr == NULL) {
     return 0;
   }
-
   assert(CFGTraits::isCondBranch(branchInstr));
 
   BlockT *trueBlk = CFGTraits::getTrueBranch(branchInstr);
@@ -691,6 +691,15 @@ int CFGStructurizer<PassT>::ifPatternMatch(BlockT *curBlk) {
     falseBlk = NULL;
   } else if (falseBlk->succ_size() == 1
              && *falseBlk->succ_begin() == trueBlk) {
+    const R600InstrInfo *TII =
+               static_cast<const R600InstrInfo *>(passRep->getTargetInstrInfo());
+    MachineBasicBlock *TBB, *FBB;
+    SmallVector<MachineOperand, 4> Cond;
+    TII->AnalyzeBranch(*curBlk, TBB, FBB, Cond, true);
+    TII->RemoveBranch(*curBlk);
+    TII->ReverseBranchCondition(Cond);
+    TII->InsertBranch(*curBlk, falseBlk, 0, Cond, branchInstr->getDebugLoc());
+    return ifPatternMatch(curBlk);
     landBlk = trueBlk;
     trueBlk = NULL;
   } else if (falseBlk->succ_size() == 1
@@ -1406,9 +1415,9 @@ void CFGStructurizer<PassT>::mergeIfthenelseBlock(InstrT *branchInstr,
     }
     retireBlock(curBlk, trueBlk);
   }
-  CFGTraits::insertInstrBefore(branchInstrPos, AMDGPU::ELSE, passRep);
-
   if (falseBlk) {
+    CFGTraits::insertInstrBefore(branchInstrPos, AMDGPU::ELSE, passRep);
+
     curBlk->splice(branchInstrPos, falseBlk, falseBlk->begin(),
                    falseBlk->end());
     curBlk->removeSuccessor(falseBlk);
diff --git a/lib/Target/R600/R600ControlFlowFinalizer.cpp b/lib/Target/R600/R600ControlFlowFinalizer.cpp
index f1e07326e2..cf3c35e23f 100644
--- a/lib/Target/R600/R600ControlFlowFinalizer.cpp
+++ b/lib/Target/R600/R600ControlFlowFinalizer.cpp
@@ -336,6 +336,8 @@ public:
         CfCount++;
       }
       std::vector<ClauseFile> FetchClauses, AluClauses;
+      std::vector<MachineInstr *> LastAlu(1);
+      std::vector<MachineInstr *> ToPopAfter;
       for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end();
           I != E;) {
         if (TII->usesTextureCache(I) || TII->usesVertexCache(I)) {
@@ -346,6 +348,11 @@ public:
         }
 
         MachineBasicBlock::iterator MI = I;
+
+        if (MI->getOpcode() != AMDGPU::ENDIF)
+          LastAlu.back() = 0;
+        if (MI->getOpcode() == AMDGPU::CF_ALU)
+          LastAlu.back() = MI;
         I++;
         switch (MI->getOpcode()) {
         case AMDGPU::CF_ALU_PUSH_BEFORE:
@@ -391,6 +398,7 @@ public:
           break;
         }
         case AMDGPU::IF_PREDICATE_SET: {
+          LastAlu.push_back(0);
           MachineInstr *MIb = BuildMI(MBB, MI, MBB.findDebugLoc(MI),
               getHWInstrDesc(CF_JUMP))
               .addImm(0)
@@ -408,7 +416,7 @@ public:
           MachineInstr *MIb = BuildMI(MBB, MI, MBB.findDebugLoc(MI),
               getHWInstrDesc(CF_ELSE))
               .addImm(0)
-              .addImm(1);
+              .addImm(0);
           DEBUG(dbgs() << CfCount << ":"; MIb->dump(););
           IfThenElseStack.push_back(MIb);
           MI->eraseFromParent();
@@ -417,17 +425,23 @@ public:
         }
         case AMDGPU::ENDIF: {
           CurrentStack--;
+          if (LastAlu.back()) {
+            ToPopAfter.push_back(LastAlu.back());
+          } else {
+            MachineInstr *MIb = BuildMI(MBB, MI, MBB.findDebugLoc(MI),
+                getHWInstrDesc(CF_POP))
+                .addImm(CfCount + 1)
+                .addImm(1);
+            (void)MIb;
+            DEBUG(dbgs() << CfCount << ":"; MIb->dump(););
+            CfCount++;
+          }
           MachineInstr *IfOrElseInst = IfThenElseStack.back();
           IfThenElseStack.pop_back();
-          CounterPropagateAddr(IfOrElseInst, CfCount + 1);
-          MachineInstr *MIb = BuildMI(MBB, MI, MBB.findDebugLoc(MI),
-              getHWInstrDesc(CF_POP))
-              .addImm(CfCount + 1)
-              .addImm(1);
-          (void)MIb;
-          DEBUG(dbgs() << CfCount << ":"; MIb->dump(););
+          CounterPropagateAddr(IfOrElseInst, CfCount);
+          IfOrElseInst->getOperand(1).setImm(1);
+          LastAlu.pop_back();
           MI->eraseFromParent();
-          CfCount++;
           break;
         }
         case AMDGPU::PREDICATED_BREAK: {
@@ -472,6 +486,20 @@ public:
           break;
         }
       }
+      for (unsigned i = 0, e = ToPopAfter.size(); i < e; ++i) {
+        MachineInstr *Alu = ToPopAfter[i];
+        BuildMI(MBB, Alu, MBB.findDebugLoc((MachineBasicBlock::iterator)Alu),
+            TII->get(AMDGPU::CF_ALU_POP_AFTER))
+            .addImm(Alu->getOperand(0).getImm())
+            .addImm(Alu->getOperand(1).getImm())
+            .addImm(Alu->getOperand(2).getImm())
+            .addImm(Alu->getOperand(3).getImm())
+            .addImm(Alu->getOperand(4).getImm())
+            .addImm(Alu->getOperand(5).getImm())
+            .addImm(Alu->getOperand(6).getImm())
+            .addImm(Alu->getOperand(7).getImm());
+        Alu->eraseFromParent();
+      }
       MFI->StackSize = getHWStackSize(MaxStack, hasPush);
     }
 
diff --git a/lib/Target/R600/R600InstrInfo.cpp b/lib/Target/R600/R600InstrInfo.cpp
index 8fd838599f..6470beda46 100644
--- a/lib/Target/R600/R600InstrInfo.cpp
+++ b/lib/Target/R600/R600InstrInfo.cpp
@@ -387,7 +387,6 @@ R600InstrInfo::RemoveBranch(MachineBasicBlock &MBB) const {
   // They may be needed when predicating instructions.
 
   MachineBasicBlock::iterator I = MBB.end();
-
   if (I == MBB.begin()) {
     return 0;
   }
diff --git a/lib/Target/R600/R600Instructions.td b/lib/Target/R600/R600Instructions.td
index 5ca494ddf7..cbe2a87bf6 100644
--- a/lib/Target/R600/R600Instructions.td
+++ b/lib/Target/R600/R600Instructions.td
@@ -940,6 +940,7 @@ ins, AsmPrint, [] >, CF_WORD0_EG, CF_WORD1_EG {
 
 def CF_ALU : ALU_CLAUSE<8, "ALU">;
 def CF_ALU_PUSH_BEFORE : ALU_CLAUSE<9, "ALU_PUSH_BEFORE">;
+def CF_ALU_POP_AFTER : ALU_CLAUSE<10, "ALU_POP_AFTER">;
 
 def FETCH_CLAUSE : AMDGPUInst <(outs),
 (ins i32imm:$addr), "Fetch clause starting at $addr:", [] > {