diff options
| author | Tvrtko Ursulin <tvrtko.ursulin@intel.com> | 2018-05-15 11:37:40 +0100 |
|---|---|---|
| committer | Tvrtko Ursulin <tvrtko.ursulin@intel.com> | 2018-09-20 10:28:06 +0100 |
| commit | 5ff04a9fc95efbb568dfa696ea2d9e713cd9bf37 (patch) | |
| tree | bf994618aa7f47d57145234594830f2bb3701a08 | |
| parent | 1b425cf7bf74e8ea2023b776377b70bd58ac708f (diff) | |
i915_query: Add SFC to testing
...
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
| -rw-r--r-- | tests/i915_query.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/tests/i915_query.c b/tests/i915_query.c index d3cdab32..b2f5da8f 100644 --- a/tests/i915_query.c +++ b/tests/i915_query.c @@ -503,6 +503,7 @@ struct drm_i915_engine_info { /** Capabilities of this engine. */ __u64 capabilities; #define I915_VCS_CLASS_CAPABILITY_HEVC (1 << 0) +#define I915_VCS_CLASS_CAPABILITY_SFC (1 << 1) __u64 rsvd1[2]; }; @@ -744,6 +745,13 @@ static void engines(int fd) else igt_assert(!(engine->capabilities & I915_VCS_CLASS_CAPABILITY_HEVC)); + if (intel_gen(intel_get_drm_devid(fd)) >= 9) + igt_assert(!!(engine->capabilities & + I915_VCS_CLASS_CAPABILITY_SFC) == + !(engine->instance & 1)); + else + igt_assert(!(engine->capabilities & + I915_VCS_CLASS_CAPABILITY_SFC)); break; case 1: igt_assert(gem_has_bsd2(fd)); |