diff options
| author | Craig Topper <craig.topper@gmail.com> | 2015-01-07 08:10:36 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@gmail.com> | 2015-01-07 08:10:36 +0000 |
| commit | ebddeaee40282b941fdac09b0859c135ffdf7ae6 (patch) | |
| tree | 2365d17df254d9d3bbdbfcf028fb0cd030b09e97 | |
| parent | decea4d6a65da734eaf36a97e880e9692b841a73 (diff) | |
[X86] Don't mark the shift by 1 instructions as isConvertibleToThreeAddress. There is no handling for them.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225344 91177308-0d34-0410-b5e6-96231b3b80d8
| -rw-r--r-- | lib/Target/X86/X86InstrShiftRotate.td | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/Target/X86/X86InstrShiftRotate.td b/lib/Target/X86/X86InstrShiftRotate.td index 3f1646907b6..c706d43c9f5 100644 --- a/lib/Target/X86/X86InstrShiftRotate.td +++ b/lib/Target/X86/X86InstrShiftRotate.td @@ -49,6 +49,7 @@ def SHL64ri : RIi8<0xC1, MRM4r, (outs GR64:$dst), "shl{q}\t{$src2, $dst|$dst, $src2}", [(set GR64:$dst, (shl GR64:$src1, (i8 imm:$src2)))], IIC_SR>; +} // isConvertibleToThreeAddress = 1 // NOTE: We don't include patterns for shifts of a register by one, because // 'add reg,reg' is cheaper (and we have a Pat pattern for shift-by-one). @@ -62,7 +63,6 @@ def SHL32r1 : I<0xD1, MRM4r, (outs GR32:$dst), (ins GR32:$src1), def SHL64r1 : RI<0xD1, MRM4r, (outs GR64:$dst), (ins GR64:$src1), "shl{q}\t$dst", [], IIC_SR>; } // hasSideEffects = 0 -} // isConvertibleToThreeAddress = 1 } // Constraints = "$src = $dst", SchedRW |