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| author | Topi Pohjolainen <topi.pohjolainen@intel.com> | 2018-04-19 07:41:34 -0400 |
|---|---|---|
| committer | Topi Pohjolainen <topi.pohjolainen@intel.com> | 2018-04-19 07:41:34 -0400 |
| commit | f967a5cce66523ae237cc993288d95b881126ace (patch) | |
| tree | 43e08ea07013d276533af30ee6ad4375555b0aeb | |
| parent | 4d20b65841852d056fcd479d9f2b9c2335dad533 (diff) | |
first clear without blorp
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_clear.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_clear.c b/src/mesa/drivers/dri/i965/brw_clear.c index aa882c9352..0e0f862a95 100644 --- a/src/mesa/drivers/dri/i965/brw_clear.c +++ b/src/mesa/drivers/dri/i965/brw_clear.c @@ -315,14 +315,14 @@ brw_clear(struct gl_context *ctx, GLbitfield mask) mt->stencil_mt->r8stencil_needs_update = true; } -#if 0 - if (mask & BUFFER_BITS_COLOR) { + static unsigned count = 0; + + if (count++ >= 1 && (mask & BUFFER_BITS_COLOR)) { brw_blorp_clear_color(brw, fb, mask, partial_clear, ctx->Color.sRGBEnabled); debug_mask("blorp color", mask & BUFFER_BITS_COLOR); mask &= ~BUFFER_BITS_COLOR; } -#endif if (devinfo->gen >= 6 && (mask & BUFFER_BITS_DEPTH_STENCIL)) { brw_blorp_clear_depth_stencil(brw, fb, mask, partial_clear); |