diff options
| author | Dave Airlie <airlied@itt42.(none)> | 2010-03-23 13:35:51 +1000 |
|---|---|---|
| committer | Dave Airlie <airlied@itt42.(none)> | 2010-03-23 13:36:17 +1000 |
| commit | 56f43ac8da57ec953af6288ca7328ca03e077bee (patch) | |
| tree | eaaffb1421541a489ab1fff808d8732a1c4e8bed | |
| parent | 2e22c360eaf22c1ebf4d5ac5f377400858816c42 (diff) | |
radeontool: add a bunch more pll regs
| -rw-r--r-- | radeon_reg.h | 5 | ||||
| -rw-r--r-- | radeontool.c | 19 |
2 files changed, 24 insertions, 0 deletions
diff --git a/radeon_reg.h b/radeon_reg.h index 5fa1e6d..d8ae5a7 100644 --- a/radeon_reg.h +++ b/radeon_reg.h @@ -3027,5 +3027,10 @@ #define RADEON_RBBM_CMDFIFO_DATA 0xe74 #define RADEON_RBBM_CMDFIFO_STAT 0xe7c +#define RADEON_CLK_TEST_ONE 0x1d +#define RADEON_SPLL_CNTL 0x0c +#define RADEON_CLK_PWRMGT_CNTL 0x14 +#define RADEON_PLL_PWRMGT_CNTL 0x15 + #endif diff --git a/radeontool.c b/radeontool.c index 907927f..8695e06 100644 --- a/radeontool.c +++ b/radeontool.c @@ -328,6 +328,8 @@ static struct { REGLIST(DAC_MACRO_CNTL), REGLIST(TV_DAC_CNTL), REGLIST(DISP_OUTPUT_CNTL), + REGLIST(DISPLAY_BASE_ADDR), + REGLIST(DISPLAY2_BASE_ADDR), REGLIST(DAC_CRC_SIG), REGLIST(DAC_DATA), REGLIST(DAC_MASK), @@ -341,6 +343,7 @@ static struct { REGLIST(DESTINATION_3D_CLR_CMP_VAL), REGLIST(DESTINATION_3D_CLR_CMP_MSK), REGLIST(DEVICE_ID), + REGLIST(DISP_HW_DEBUG), REGLIST(DISP_MISC_CNTL), REGLIST(DP_BRUSH_BKGD_CLR), REGLIST(DP_BRUSH_FRGD_CLR), @@ -538,10 +541,26 @@ static struct { REGLIST(PCI_GART_PAGE), REGLIST_CLK(PIXCLKS_CNTL), REGLIST_CLK(VCLK_ECP_CNTL), + REGLIST_CLK(MPLL_CNTL), + REGLIST_CLK(MCLK_CNTL), REGLIST_CLK(PPLL_DIV_0), + REGLIST_CLK(PPLL_DIV_1), + REGLIST_CLK(PPLL_DIV_2), + REGLIST_CLK(PPLL_DIV_3), + REGLIST_CLK(PPLL_REF_DIV), + REGLIST_CLK(P2PLL_REF_DIV), + REGLIST_CLK(P2PLL_DIV_0), REGLIST_CLK(PPLL_CNTL), + REGLIST_CLK(P2PLL_CNTL), + REGLIST_CLK(SPLL_CNTL), + REGLIST_CLK(AGP_PLL_CNTL), + REGLIST_CLK(HTOTAL_CNTL), + REGLIST_CLK(HTOTAL2_CNTL), REGLIST_CLK(CLK_PIN_CNTL), + REGLIST_CLK(CLK_PWRMGT_CNTL), + REGLIST_CLK(PLL_PWRMGT_CNTL), REGLIST_CLK(SCLK_CNTL), + REGLIST_CLK(CLK_TEST_ONE), REGLIST_CLK(PWRMAN_MISC), REGLIST_CLK(SS_INT_CNTL), REGLIST(PLANE_3D_MASK_C), |