| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2012-12-28 | mips: load: use lbu instead of lb | Guillaume Emont | 1 | -1/+1 |
| 2012-12-28 | mips: convubw: extract bytes into 2 halfwords when shift==1 | Guillaume Emont | 1 | -4/+2 |
| 2012-12-28 | mips: convsuswb and convssswb: put results in lower half | Guillaume Emont | 1 | -4/+8 |
| 2012-12-28 | mips: _rule_load(): directly concatenate bytes for byte loads with shift 1 | Guillaume Emont | 1 | -1/+1 |
| 2012-12-28 | mips: added emit for precr.qb.ph | Guillaume Emont | 2 | -0/+17 |
| 2012-12-28 | mips: fix shra.ph: correctly get shift value | Guillaume Emont | 1 | -2/+2 |
| 2012-12-28 | mips: loadp: load as quad bytes or paired halfword for values of (resp) 1 or ... | Guillaume Emont | 1 | -0/+6 |
| 2012-12-28 | mips: added emit functions for subu.ph and replv.ph | Guillaume Emont | 2 | -0/+31 |
| 2012-12-28 | mips: mark t3->t5 as unavailable | Guillaume Emont | 1 | -0/+3 |
| 2012-12-28 | mips: made convubw a no-op | Guillaume Emont | 1 | -1/+4 |
| 2012-12-28 | mips: avoid orc_compiler_get_temp_reg() | Guillaume Emont | 1 | -15/+13 |
| 2012-12-28 | mips: added rules for convsuswb, convubw, avgub, subw | Guillaume Emont | 1 | -9/+56 |
| 2012-12-28 | mips: add missing nop in a branch delay slot | Guillaume Emont | 1 | -1/+2 |
| 2012-12-28 | mips: added _emit() for lbu, subq.ph and preceu.ph.qbr | Guillaume Emont | 2 | -0/+44 |
| 2012-12-28 | mips: implement swapl | Guillaume Emont | 1 | -0/+11 |
| 2012-12-28 | mips: _emit() for wsbh | Guillaume Emont | 2 | -0/+17 |
| 2012-12-28 | mips: implement loadupdb | Guillaume Emont | 2 | -1/+47 |
| 2012-12-28 | mips: made sure more registers are available and use temporary registers more... | Guillaume Emont | 2 | -41/+45 |
| 2012-12-28 | mips: implement loadupib | Guillaume Emont | 2 | -0/+84 |
| 2012-12-28 | mips: initialise pointer offset registers when they exist | Guillaume Emont | 1 | -3/+7 |
| 2012-12-28 | mips: handle various update types for vars | Guillaume Emont | 2 | -8/+19 |
| 2012-12-28 | mips: emit functions for adduh_r.qb, rpelv.qb and packrl.ph | Guillaume Emont | 2 | -0/+51 |
| 2012-12-28 | mips: implemented orc instructions subb, mullw, convssswb, mergebw, subssw, s... | Guillaume Emont | 1 | -0/+75 |
| 2012-12-28 | mips: added emit for subu.qb, subq_s.ph, and, mul.ph, repl.ph, cmp.lt.ph, pic... | Guillaume Emont | 2 | -0/+115 |
| 2012-12-28 | mips: implement convsbw | Guillaume Emont | 1 | -0/+13 |
| 2012-12-28 | mips: emit functions for shll.ph and shra.ph | Guillaume Emont | 2 | -0/+34 |
| 2012-12-28 | mips: implement flush_cache, fixing segfaults on actual hardware | Guillaume Emont | 1 | -0/+12 |
| 2012-12-28 | mips: frame pointer when ORC_CODE=debug | Guillaume Emont | 2 | -4/+37 |
| 2012-12-28 | mips: emit invariant instructions in _load_constants_inner() | Guillaume Emont | 1 | -0/+26 |
| 2012-12-28 | mips: fixed convssslw, implementing it with slt/movn | Guillaume Emont | 1 | -2/+14 |
| 2012-12-28 | mips: _emit_slt() and _emit_movn() | Guillaume Emont | 2 | -0/+35 |
| 2012-12-28 | mips: change insn shift when x2/x4 is present | Guillaume Emont | 1 | -0/+6 |
| 2012-12-28 | mips: $t3 is now our tmpreg | Guillaume Emont | 2 | -11/+11 |
| 2012-12-28 | mips: implement loadp* orc instructions | Guillaume Emont | 3 | -11/+53 |
| 2012-12-28 | mips: add _emit_lui() | Guillaume Emont | 2 | -0/+11 |
| 2012-12-28 | mips: rules for mergewl and addssw | Guillaume Emont | 1 | -0/+24 |
| 2012-12-28 | mips: add emit method for addq_s.ph | Guillaume Emont | 2 | -0/+14 |
| 2012-12-28 | mips: rules for mulswl, shrsl and convssslw | Guillaume Emont | 1 | -0/+33 |
| 2012-12-28 | mips: add emit methods for sra, mul, mtlo and extr_s.h | Guillaume Emont | 2 | -0/+59 |
| 2012-12-28 | mips: fix stride handling in 2d | Guillaume Emont | 1 | -8/+21 |
| 2012-12-28 | mips: handle case when n < (# of iterations to reach alignment) | Guillaume Emont | 1 | -2/+23 |
| 2012-12-28 | mips: addedsupport for bltz,bgtz with immediate offset | Guillaume Emont | 2 | -13/+35 |
| 2012-12-28 | mips: _assemble: ensure we load n after LABEL_OUTER_LOOP | Guillaume Emont | 1 | -4/+5 |
| 2012-12-28 | mips: handle 2d loops | Guillaume Emont | 1 | -8/+55 |
| 2012-12-28 | mips: generate loops for all (or most) alignment cases | Guillaume Emont | 1 | -26/+83 |
| 2012-12-28 | mips: addede orc_mips_emit_conditional_branch_with_offset() | Guillaume Emont | 2 | -0/+37 |
| 2012-12-28 | mips: added emit for beq, or, ori | Guillaume Emont | 2 | -0/+27 |
| 2012-12-28 | mips: a1-a3 registers do not need to be saved | Guillaume Emont | 1 | -3/+0 |
| 2012-12-28 | mips: introduced orc_mips_emit_full_loop() to avoid cut and pasted code | Guillaume Emont | 1 | -52/+40 |
| 2012-12-28 | mips: added a special version of the region1 loop for the case where we can h... | Guillaume Emont | 1 | -0/+76 |
