diff options
| author | Daniel Vetter <daniel.vetter@ffwll.ch> | 2012-06-26 16:17:08 +0200 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2012-06-26 16:17:08 +0200 |
| commit | ba854a07fb51c639a16e5f2df04776992284c248 (patch) | |
| tree | d1a8a556e60f1887f14a06ca96ab5bd0e8fa4580 | |
| parent | 50508b2427cbda7af89daa503ce8cff75578e060 (diff) | |
i965: adjust gen6+ timestamp pipe_control writes
Similar treatment to the depth count pipe_control writes
- Add the CS_STALL workaround, timestamp writes are non-zero post-sync
ops, too.
- Also ensure that we write the full 64bits by using the 5 dword long
variant of pipe_control.
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_queryobj.c | 32 |
1 files changed, 28 insertions, 4 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_queryobj.c b/src/mesa/drivers/dri/i965/brw_queryobj.c index dae7af0591..36de43e16a 100644 --- a/src/mesa/drivers/dri/i965/brw_queryobj.c +++ b/src/mesa/drivers/dri/i965/brw_queryobj.c @@ -131,14 +131,26 @@ brw_begin_query(struct gl_context *ctx, struct gl_query_object *q) 4096, 4096); if (intel->gen >= 6) { - BEGIN_BATCH(4); - OUT_BATCH(_3DSTATE_PIPE_CONTROL); + BEGIN_BATCH(9); + + /* Workaround: A non-zero post-sync op (i.e. the DEPTH_COUNT write below + * needs a pipe control with CS_STALL set beforehand. + * Workaround: CS_STALL can't be set alone, we pick STALL_AT_SCOREBOARD + * like the kernel. */ + OUT_BATCH(_3DSTATE_PIPE_CONTROL); + OUT_BATCH(PIPE_CONTROL_CS_STALL | + PIPE_CONTROL_STALL_AT_SCOREBOARD); + OUT_BATCH(0); + OUT_BATCH(0); + + OUT_BATCH(_3DSTATE_PIPE_CONTROL_5); OUT_BATCH(PIPE_CONTROL_WRITE_TIMESTAMP); OUT_RELOC(query->bo, I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, PIPE_CONTROL_GLOBAL_GTT_WRITE | 0); OUT_BATCH(0); + OUT_BATCH(0); ADVANCE_BATCH(); } else { @@ -199,14 +211,26 @@ brw_end_query(struct gl_context *ctx, struct gl_query_object *q) switch (query->Base.Target) { case GL_TIME_ELAPSED_EXT: if (intel->gen >= 6) { - BEGIN_BATCH(4); - OUT_BATCH(_3DSTATE_PIPE_CONTROL); + BEGIN_BATCH(9); + + /* Workaround: A non-zero post-sync op (i.e. the DEPTH_COUNT write below + * needs a pipe control with CS_STALL set beforehand. + * Workaround: CS_STALL can't be set alone, we pick STALL_AT_SCOREBOARD + * like the kernel. */ + OUT_BATCH(_3DSTATE_PIPE_CONTROL); + OUT_BATCH(PIPE_CONTROL_CS_STALL | + PIPE_CONTROL_STALL_AT_SCOREBOARD); + OUT_BATCH(0); + OUT_BATCH(0); + + OUT_BATCH(_3DSTATE_PIPE_CONTROL_5); OUT_BATCH(PIPE_CONTROL_WRITE_TIMESTAMP); OUT_RELOC(query->bo, I915_GEM_DOMAIN_INSTRUCTION, I915_GEM_DOMAIN_INSTRUCTION, PIPE_CONTROL_GLOBAL_GTT_WRITE | 8); OUT_BATCH(0); + OUT_BATCH(0); ADVANCE_BATCH(); } else { |