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| author | Jason Ekstrand <jason@jlekstrand.net> | 2016-01-06 15:30:39 -0800 |
|---|---|---|
| committer | Jason Ekstrand <jason.ekstrand@intel.com> | 2016-01-07 16:14:42 -0800 |
| commit | 040e314143f973968169bab8ef379bac68fc8626 (patch) | |
| tree | cd0878d01c35d668dd796ee3638eb8e8053cae60 | |
| parent | d00abcc28376116554799d403211367470dff200 (diff) | |
i965/compiler: Enable more lowering in NIR
We don't need these for GLSL or ARB, but we need them for SPIR-V
Reviewed-by: Iago Toral Quiroga <itoral@igalia.com>
Reviewed-by: Matt Turner <mattst88@gmail.com>
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_shader.cpp | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp b/src/mesa/drivers/dri/i965/brw_shader.cpp index 4bd24a70b5..49ff835fa8 100644 --- a/src/mesa/drivers/dri/i965/brw_shader.cpp +++ b/src/mesa/drivers/dri/i965/brw_shader.cpp @@ -104,6 +104,13 @@ brw_compiler_create(void *mem_ctx, const struct brw_device_info *devinfo) */ nir_options->lower_ffma = true; nir_options->lower_sub = true; + nir_options->lower_fdiv = true; + nir_options->lower_scmp = true; + nir_options->lower_fmod = true; + nir_options->lower_bitfield_insert = true; + nir_options->lower_uadd_carry = true; + nir_options->lower_usub_borrow = true; + /* In the vec4 backend, our dpN instruction replicates its result to all * the components of a vec4. We would like NIR to give us replicated fdot * instructions because it can optimize better for us. |