From 74dfa7c009ea41c195f49937abe0de4eedf852f8 Mon Sep 17 00:00:00 2001 From: Junyan He Date: Tue, 6 Jan 2015 18:02:53 +0800 Subject: Modify the cmp and sel for I64 and cleanup all virtual functions. Signed-off-by: Junyan He Reviewed-by: Zhigang Gong --- backend/src/backend/gen8_context.cpp | 44 ++++++++++++++++++++++++++++++ backend/src/backend/gen8_context.hpp | 6 ++++ backend/src/backend/gen_context.hpp | 12 ++++---- backend/src/backend/gen_insn_selection.cpp | 4 +-- 4 files changed, 58 insertions(+), 8 deletions(-) diff --git a/backend/src/backend/gen8_context.cpp b/backend/src/backend/gen8_context.cpp index daa4182b..bbfec961 100644 --- a/backend/src/backend/gen8_context.cpp +++ b/backend/src/backend/gen8_context.cpp @@ -102,6 +102,50 @@ namespace gbe } } + void Gen8Context::emitI64ShiftInstruction(const SelectionInstruction &insn) + { + switch (insn.opcode) { + case SEL_OP_I64SHL: + case SEL_OP_I64SHR: + case SEL_OP_I64ASR: + /* Should never come to here, just use the common OPCODE. */ + GBE_ASSERT(0); + break; + default: + GenContext::emitI64ShiftInstruction(insn); + } + } + + void Gen8Context::emitI64CompareInstruction(const SelectionInstruction &insn) + { + /* Should never come to here, just use the common OPCODE. */ + GBE_ASSERT(0); + } + + void Gen8Context::emitI64SATADDInstruction(const SelectionInstruction &insn) + { + /* Should never come to here, just use the common OPCODE. */ + GBE_ASSERT(0); + } + + void Gen8Context::emitI64SATSUBInstruction(const SelectionInstruction &insn) + { + /* Should never come to here, just use the common OPCODE. */ + GBE_ASSERT(0); + } + + void Gen8Context::emitI64ToFloatInstruction(const SelectionInstruction &insn) + { + /* Should never come to here, just use the common OPCODE. */ + GBE_ASSERT(0); + } + + void Gen8Context::emitFloatToI64Instruction(const SelectionInstruction &insn) + { + /* Should never come to here, just use the common OPCODE. */ + GBE_ASSERT(0); + } + static void calculateFullU64MUL(GenEncoder* p, GenRegister src0, GenRegister src1, GenRegister dst_h, GenRegister dst_l, GenRegister s0l_s1h, GenRegister s0h_s1l) { diff --git a/backend/src/backend/gen8_context.hpp b/backend/src/backend/gen8_context.hpp index bea78b65..d5932253 100644 --- a/backend/src/backend/gen8_context.hpp +++ b/backend/src/backend/gen8_context.hpp @@ -55,6 +55,12 @@ namespace gbe virtual void emitI64MULHIInstruction(const SelectionInstruction &insn); virtual void emitI64RHADDInstruction(const SelectionInstruction &insn); virtual void emitI64HADDInstruction(const SelectionInstruction &insn); + virtual void emitI64ShiftInstruction(const SelectionInstruction &insn); + virtual void emitI64CompareInstruction(const SelectionInstruction &insn); + virtual void emitI64SATADDInstruction(const SelectionInstruction &insn); + virtual void emitI64SATSUBInstruction(const SelectionInstruction &insn); + virtual void emitI64ToFloatInstruction(const SelectionInstruction &insn); + virtual void emitFloatToI64Instruction(const SelectionInstruction &insn); virtual void emitI64MADSATInstruction(const SelectionInstruction &insn); virtual void emitWrite64Instruction(const SelectionInstruction &insn); diff --git a/backend/src/backend/gen_context.hpp b/backend/src/backend/gen_context.hpp index 3d01f2b1..e307d78d 100644 --- a/backend/src/backend/gen_context.hpp +++ b/backend/src/backend/gen_context.hpp @@ -133,12 +133,12 @@ namespace gbe virtual void emitI64MADSATInstruction(const SelectionInstruction &insn); virtual void emitI64HADDInstruction(const SelectionInstruction &insn); virtual void emitI64RHADDInstruction(const SelectionInstruction &insn); - void emitI64ShiftInstruction(const SelectionInstruction &insn); - void emitI64CompareInstruction(const SelectionInstruction &insn); - void emitI64SATADDInstruction(const SelectionInstruction &insn); - void emitI64SATSUBInstruction(const SelectionInstruction &insn); - void emitI64ToFloatInstruction(const SelectionInstruction &insn); - void emitFloatToI64Instruction(const SelectionInstruction &insn); + virtual void emitI64ShiftInstruction(const SelectionInstruction &insn); + virtual void emitI64CompareInstruction(const SelectionInstruction &insn); + virtual void emitI64SATADDInstruction(const SelectionInstruction &insn); + virtual void emitI64SATSUBInstruction(const SelectionInstruction &insn); + virtual void emitI64ToFloatInstruction(const SelectionInstruction &insn); + virtual void emitFloatToI64Instruction(const SelectionInstruction &insn); void emitCompareInstruction(const SelectionInstruction &insn); void emitJumpInstruction(const SelectionInstruction &insn); void emitIndirectMoveInstruction(const SelectionInstruction &insn); diff --git a/backend/src/backend/gen_insn_selection.cpp b/backend/src/backend/gen_insn_selection.cpp index 27292a3b..aeb5da38 100644 --- a/backend/src/backend/gen_insn_selection.cpp +++ b/backend/src/backend/gen_insn_selection.cpp @@ -3506,7 +3506,7 @@ namespace gbe sel.curr.modFlag = 1; sel.curr.flagIndex = (uint16_t)dst; sel.curr.grfFlag = needStoreBool; // indicate whether we need to allocate grf to store this boolean. - if (type == TYPE_S64 || type == TYPE_U64) { + if ((type == TYPE_S64 || type == TYPE_U64) && !sel.hasLongType()) { GenRegister tmp[3]; for(int i=0; i<3; i++) tmp[i] = sel.selReg(sel.reg(FAMILY_DWORD)); @@ -4059,7 +4059,7 @@ namespace gbe // just a hint. We need to fix it in the future. if (!dag0 || (sel.isScalarReg(dag0->insn.getDst(0)))) sel.curr.externFlag = 1; - if(type == ir::TYPE_S64 || type == ir::TYPE_U64) + if((type == ir::TYPE_S64 || type == ir::TYPE_U64) && !sel.hasLongType()) sel.SEL_INT64(dst, src0, src1); else sel.SEL(dst, src0, src1); -- cgit v1.2.3