diff options
| author | Rafael Antognolli <rafael.antognolli@intel.com> | 2017-08-29 16:30:26 -0700 |
|---|---|---|
| committer | Rafael Antognolli <rafael.antognolli@intel.com> | 2018-02-21 10:30:28 -0800 |
| commit | e1f71d18b7fb58212dd3dba5947f7448bf84b8f5 (patch) | |
| tree | 5acd4f23a75222edb6e8c08ef51a607141a2985e | |
| parent | 1904e3767f38c3bfe9f032e545217883c6126008 (diff) | |
i965/surface_state: Emit the clear color address instead of value.
On Gen10, when emitting the surface state, use the value stored in the
clear color entry buffer by using a clear color address in the surface
state.
Signed-off-by: Rafael Antognolli <rafael.antognolli@intel.com>
| -rw-r--r-- | src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c index a5424ae320..b1f94f181b 100644 --- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c +++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c @@ -184,6 +184,10 @@ brw_emit_surface_state(struct brw_context *brw, brw->isl_dev.ss.align, surf_offset); + bool use_clear_address = devinfo->gen >= 10 && aux_surf; + uint32_t clear_offset = + use_clear_address ? aux_offset + aux_surf->size : 0; + isl_surf_fill_state(&brw->isl_dev, state, .surf = &mt->surf, .view = &view, .address = brw_state_reloc(&brw->batch, *surf_offset + brw->isl_dev.ss.addr_offset, @@ -192,6 +196,8 @@ brw_emit_surface_state(struct brw_context *brw, .aux_address = aux_offset, .mocs = brw_get_bo_mocs(devinfo, mt->bo), .clear_color = clear_color, + .use_clear_address = use_clear_address, + .clear_address = clear_offset, .x_offset_sa = tile_x, .y_offset_sa = tile_y); if (aux_surf) { /* On gen7 and prior, the upper 20 bits of surface state DWORD 6 are the @@ -210,6 +216,16 @@ brw_emit_surface_state(struct brw_context *brw, aux_bo, *aux_addr, reloc_flags); } + + if (use_clear_address) { + /* Make sure the offset is aligned with a cacheline. */ + assert((clear_offset & 0x3f) == 0); + uint32_t *clear_address = state + brw->isl_dev.ss.clear_value_offset; + *clear_address = brw_state_reloc(&brw->batch, + *surf_offset + + brw->isl_dev.ss.clear_value_offset, + aux_bo, *clear_address, reloc_flags); + } } static uint32_t |