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authorGurchetan Singh <gurchetansingh@google.com>2017-06-28 14:01:00 -0700
committerchrome-bot <chrome-bot@chromium.org>2017-07-21 16:02:36 -0700
commit33cca93af658650b655b4b5dcfb18a3235a100cf (patch)
tree43c6505bd9113afa6c631eac273755c1a7a36a96 /rockchip.c
parent11f3d085d1bb5307960a71c99dde658823326d89 (diff)
minigbm: rockchip: align NV12 planes to 64 bytes
When running the mapped_texture_test with the Mali EGL implementation compiled with debug symbols, Mali complains that the NV12 planes are not sufficiently aligned (specifically, mali_cobj_surface.c line 1806). Fix this. BUG=b:63910596 TEST=run Youtube App video on Kevin, at fullscreen and at normal size Change-Id: Ia204360c3aebe2bbd545ac7be0f6d095b0412f9d Reviewed-on: https://chromium-review.googlesource.com/556540 Commit-Ready: Gurchetan Singh <gurchetansingh@chromium.org> Tested-by: Gurchetan Singh <gurchetansingh@chromium.org> Reviewed-by: Stéphane Marchesin <marcheu@chromium.org>
Diffstat (limited to 'rockchip.c')
-rw-r--r--rockchip.c35
1 files changed, 20 insertions, 15 deletions
diff --git a/rockchip.c b/rockchip.c
index 66f1ea0..d8f8cd3 100644
--- a/rockchip.c
+++ b/rockchip.c
@@ -162,16 +162,7 @@ static int rockchip_bo_create_with_modifiers(struct bo *bo, uint32_t width, uint
size_t plane;
struct drm_rockchip_gem_create gem_create;
- if (format == DRM_FORMAT_NV12) {
- uint32_t w_mbs = DIV_ROUND_UP(ALIGN(width, 16), 16);
- uint32_t h_mbs = DIV_ROUND_UP(ALIGN(height, 16), 16);
-
- uint32_t aligned_width = w_mbs * 16;
- uint32_t aligned_height = DIV_ROUND_UP(h_mbs * 16 * 3, 2);
-
- drv_bo_from_format(bo, aligned_width, height, format);
- bo->total_size = bo->strides[0] * aligned_height + w_mbs * h_mbs * 128;
- } else if (width <= 2560 &&
+ if (width <= 2560 &&
has_modifier(modifiers, count, DRM_FORMAT_MOD_CHROMEOS_ROCKCHIP_AFBC)) {
/* If the caller has decided they can use AFBC, always
* pick that */
@@ -183,20 +174,34 @@ static int rockchip_bo_create_with_modifiers(struct bo *bo, uint32_t width, uint
return -1;
}
- uint32_t stride;
+ uint32_t stride, extra_size;
/*
- * Since the ARM L1 cache line size is 64 bytes, align to that
- * as a performance optimization. For YV12, the Mali cmem allocator
- * requires that chroma planes are aligned to 64-bytes, so align the
- * luma plane to 128 bytes.
+ * Since the ARM L1 cache line size is 64 bytes, align to that as a performance
+ * optimization. For YV12, the Mali cmem allocator requires that chroma planes are
+ * aligned to 64-bytes, so align the luma plane to 128 bytes.
*/
+ extra_size = 0;
stride = drv_stride_from_format(format, width, 0);
if (format == DRM_FORMAT_YVU420 || format == DRM_FORMAT_YVU420_ANDROID)
stride = ALIGN(stride, 128);
else
stride = ALIGN(stride, 64);
+ if (format == DRM_FORMAT_NV12) {
+ /* RK VPU needs the buffers macroblock-aligned. */
+ stride = ALIGN(stride, 16);
+ height = ALIGN(height, 16);
+ /*
+ * The RK VPU driver requires extra space for motion vectors. The amount
+ * of extra space required is specified in 16x16 macroblocks.
+ */
+ uint32_t w_mbs = DIV_ROUND_UP(stride, 16);
+ uint32_t h_mbs = DIV_ROUND_UP(height, 16);
+ extra_size = w_mbs * h_mbs * 128;
+ }
+
drv_bo_from_format(bo, stride, height, format);
+ bo->total_size += extra_size;
}
memset(&gem_create, 0, sizeof(gem_create));