diff options
| author | Gurchetan Singh <gurchetansingh@chromium.org> | 2016-11-23 17:32:33 -0800 |
|---|---|---|
| committer | chrome-bot <chrome-bot@chromium.org> | 2016-12-07 13:02:04 -0800 |
| commit | 458976feb11a1f54af5954deea6f5fdc7fc24ea6 (patch) | |
| tree | b254c35f063a70c28083498be7de90094fa33d92 /amdgpu.c | |
| parent | 714c689a436b717e1cce8b3834719c3f7855532d (diff) | |
minigbm: rename DRV_BO_USE_* to BO_USE_*
It's somewhat easier to read.
BUG=none
TEST=minigbm still builds
CQ-DEPEND=CL:416290
Change-Id: I9417caff22ea66e4179fe41d534d8cb9510ef7a3
Reviewed-on: https://chromium-review.googlesource.com/414585
Commit-Ready: Gurchetan Singh <gurchetansingh@chromium.org>
Tested-by: Gurchetan Singh <gurchetansingh@chromium.org>
Reviewed-by: Stéphane Marchesin <marcheu@chromium.org>
Diffstat (limited to 'amdgpu.c')
| -rw-r--r-- | amdgpu.c | 14 |
1 files changed, 7 insertions, 7 deletions
@@ -39,11 +39,11 @@ enum { }; static struct supported_combination combos[5] = { - {DRM_FORMAT_ARGB8888, DRM_FORMAT_MOD_NONE, DRV_BO_USE_CURSOR | DRV_BO_USE_LINEAR}, - {DRM_FORMAT_ARGB8888, DRM_FORMAT_MOD_NONE, DRV_BO_USE_RENDERING}, - {DRM_FORMAT_XBGR8888, DRM_FORMAT_MOD_NONE, DRV_BO_USE_RENDERING}, - {DRM_FORMAT_XRGB8888, DRM_FORMAT_MOD_NONE, DRV_BO_USE_LINEAR}, - {DRM_FORMAT_XRGB8888, DRM_FORMAT_MOD_NONE, DRV_BO_USE_RENDERING}, + {DRM_FORMAT_ARGB8888, DRM_FORMAT_MOD_NONE, BO_USE_CURSOR | BO_USE_LINEAR}, + {DRM_FORMAT_ARGB8888, DRM_FORMAT_MOD_NONE, BO_USE_RENDERING}, + {DRM_FORMAT_XBGR8888, DRM_FORMAT_MOD_NONE, BO_USE_RENDERING}, + {DRM_FORMAT_XRGB8888, DRM_FORMAT_MOD_NONE, BO_USE_LINEAR}, + {DRM_FORMAT_XRGB8888, DRM_FORMAT_MOD_NONE, BO_USE_RENDERING}, }; static int amdgpu_set_metadata(int fd, uint32_t handle, @@ -156,7 +156,7 @@ static int amdgpu_addrlib_compute(void *addrlib, uint32_t width, /* Set the requested tiling mode. */ addr_surf_info_in.tileMode = ADDR_TM_2D_TILED_THIN1; - if (usage & (DRV_BO_USE_CURSOR | DRV_BO_USE_LINEAR)) + if (usage & (BO_USE_CURSOR | BO_USE_LINEAR)) addr_surf_info_in.tileMode = ADDR_TM_LINEAR_ALIGNED; if (width <= 16 || height <= 16) addr_surf_info_in.tileMode = ADDR_TM_1D_TILED_THIN1; @@ -174,7 +174,7 @@ static int amdgpu_addrlib_compute(void *addrlib, uint32_t width, addr_surf_info_in.flags.noStencil = 1; /* Set the micro tile type. */ - if (usage & DRV_BO_USE_SCANOUT) + if (usage & BO_USE_SCANOUT) addr_surf_info_in.tileType = ADDR_DISPLAYABLE; else addr_surf_info_in.tileType = ADDR_NON_DISPLAYABLE; |