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authorMark Mueller <MarkKMueller@gmail.com>2013-12-05 15:35:55 -0800
committerMark Mueller <MarkKMueller@gmail.com>2014-01-13 09:44:31 -0800
commit6fd64c6a2c0aa906eae712464cdbaa34747c3bde (patch)
tree9ba55379ae138c8c9468ac6542d3ccfc71146b68
parentd0e71bb0a12c54bd266bc942a836a55c8a6d8738 (diff)
Clean up method for detecting depth surface formats. Fix issue with
desktop_gl_sel. Add missing MESA_FORMAT_ABGR2101010_UINT render target.
-rw-r--r--src/mesa/drivers/dri/i965/brw_blorp.cpp16
-rw-r--r--src/mesa/drivers/dri/i965/brw_context.h12
-rw-r--r--src/mesa/drivers/dri/i965/brw_surface_formats.c27
-rw-r--r--src/mesa/drivers/dri/i965/gen7_wm_surface_state.c3
4 files changed, 31 insertions, 27 deletions
diff --git a/src/mesa/drivers/dri/i965/brw_blorp.cpp b/src/mesa/drivers/dri/i965/brw_blorp.cpp
index 4094a6d683..adeb058da2 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.cpp
+++ b/src/mesa/drivers/dri/i965/brw_blorp.cpp
@@ -91,18 +91,20 @@ brw_blorp_surface_info::set(struct brw_context *brw,
this->msaa_layout = mt->msaa_layout;
const gl_format linear_format = _mesa_get_srgb_format_linear(mt->format);
- const GLenum base_format = _mesa_get_format_base_format(mt->format);
- if (is_render_target ||
- GL_DEPTH_COMPONENT == base_format ||
- GL_STENCIL_INDEX == base_format ||
- GL_DEPTH_STENCIL == base_format) {
+ BRW_SURFACE render_surfaceformat;
+ BRW_SURFACE sample_surfaceformat;
+ brw_format_for_mesa_format(linear_format, &this->process_format_flags, &render_surfaceformat, &sample_surfaceformat);
+
+ if (is_render_target || depth_format & this->process_format_flags) {
/* set up for a render target */
- brw_format_for_mesa_format(linear_format, &this->process_format_flags, &this->brw_surfaceformat, 0);
+ this->brw_surfaceformat = render_surfaceformat;
+
_mesa_debug(&brw->ctx, "%s: using render format: 0x%x for %s\n",
__FUNCTION__, this->brw_surfaceformat, _mesa_get_format_name(mt->format));
} else {
/* set up for a sample target */
- brw_format_for_mesa_format(linear_format, &this->process_format_flags, 0, &this->brw_surfaceformat);
+ this->brw_surfaceformat = sample_surfaceformat;
+
_mesa_debug(&brw->ctx, "%s: using sample format: 0x%x for %s\n",
__FUNCTION__, this->brw_surfaceformat, _mesa_get_format_name(mt->format));
}
diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h
index 60e3ac4d9b..ecab97c255 100644
--- a/src/mesa/drivers/dri/i965/brw_context.h
+++ b/src/mesa/drivers/dri/i965/brw_context.h
@@ -205,17 +205,21 @@ typedef enum {
render_swizzle_z = 1 << 14,
render_swizzle_w = 1 << 15,
+ depth_format = 1 << 16,
scale_mask = scale_x | scale_y | scale_z | scale_w,
scale_xy = scale_x | scale_y,
- sample_swizzle_mask = sample_swizzle_x | sample_swizzle_y | sample_swizzle_z | sample_swizzle_w,
+ sample_swizzle_mask = sample_swizzle_x | sample_swizzle_y |
+ sample_swizzle_z | sample_swizzle_w,
sample_swizzle_all = sample_swizzle_mask,
sample_swizzle_xy = sample_swizzle_x | sample_swizzle_y,
- sample_swizzle_xyz = sample_swizzle_x | sample_swizzle_y | sample_swizzle_z,
- sample_swizzle_yzw = sample_swizzle_y | sample_swizzle_z | sample_swizzle_w,
+ sample_swizzle_xyz = sample_swizzle_x | sample_swizzle_y |
+ sample_swizzle_z,
+ sample_swizzle_yzw = sample_swizzle_y | sample_swizzle_z |
+ sample_swizzle_w,
render_not_supported_mask = blorp_shadow_shader,
sample_not_supported_mask = scale_mask | sample_swizzle_mask |
- sample_scale | desktop_gl_sel
+ sample_scale
} blorp_process_format;
#define BRW_NEW_URB_FENCE (1 << BRW_STATE_URB_FENCE)
diff --git a/src/mesa/drivers/dri/i965/brw_surface_formats.c b/src/mesa/drivers/dri/i965/brw_surface_formats.c
index 05f3040559..65877b3dd6 100644
--- a/src/mesa/drivers/dri/i965/brw_surface_formats.c
+++ b/src/mesa/drivers/dri/i965/brw_surface_formats.c
@@ -468,10 +468,10 @@ brw_format_for_mesa_format(gl_format mesa_format, blorp_process_format *process_
0},
[MESA_FORMAT_Z24_S8] = {BRW_SURFACEFORMAT_NONE,
BRW_SURFACEFORMAT_B8G8R8A8_UNORM,
- sample_swizzle_all},
+ depth_format | sample_swizzle_all},
[MESA_FORMAT_S8_Z24] = {BRW_SURFACEFORMAT_B8G8R8A8_UNORM,
BRW_SURFACEFORMAT_I24X8_UNORM,
- 0},
+ depth_format},
/* It appears that Z16 is slower than Z24 (on Intel Ivybridge and newer
* hardware at least), so there's no real reason to prefer it unless you're
* under memory (not memory bandwidth) pressure. Our speculation is that
@@ -486,19 +486,19 @@ brw_format_for_mesa_format(gl_format mesa_format, blorp_process_format *process_
*/
[MESA_FORMAT_Z16] = {BRW_SURFACEFORMAT_R16_UNORM,
BRW_SURFACEFORMAT_I16_UNORM,
- desktop_gl_sel},
+ depth_format | desktop_gl_sel},
[MESA_FORMAT_X8_Z24] = {BRW_SURFACEFORMAT_B8G8R8A8_UNORM,
BRW_SURFACEFORMAT_I24X8_UNORM,
- 0},
+ depth_format},
[MESA_FORMAT_Z24_X8] = {BRW_SURFACEFORMAT_NONE,
BRW_SURFACEFORMAT_NONE,
- sample_swizzle_all},
+ depth_format | sample_swizzle_all},
[MESA_FORMAT_Z32] = {BRW_SURFACEFORMAT_NONE,
BRW_SURFACEFORMAT_NONE,
- sample_swizzle_all},
+ depth_format | sample_swizzle_all},
[MESA_FORMAT_S8] = {BRW_SURFACEFORMAT_R8_UNORM,
BRW_SURFACEFORMAT_R8_UNORM,
- 0},
+ depth_format},
[MESA_FORMAT_SRGB8] = {BRW_SURFACEFORMAT_NONE,
BRW_SURFACEFORMAT_B8G8R8X8_UNORM_SRGB,
@@ -882,7 +882,7 @@ brw_format_for_mesa_format(gl_format mesa_format, blorp_process_format *process_
[MESA_FORMAT_ARGB2101010_UINT] = {BRW_SURFACEFORMAT_NONE,
BRW_SURFACEFORMAT_B10G10R10A2_UINT,
0},
- [MESA_FORMAT_ABGR2101010_UINT] = {BRW_SURFACEFORMAT_NONE,
+ [MESA_FORMAT_ABGR2101010_UINT] = {BRW_SURFACEFORMAT_R10G10B10A2_UINT,
BRW_SURFACEFORMAT_R10G10B10A2_UINT,
0},
@@ -959,11 +959,8 @@ brw_init_surface_formats(struct brw_context *brw)
blorp_process_format process_flags;
brw_format_for_mesa_format(format, &process_flags, &render_surface, &sample_surface);
- const GLenum base_format = _mesa_get_format_base_format(format);
- const bool no_filtering = _mesa_is_format_integer_color(format) ||
- GL_DEPTH_COMPONENT == base_format ||
- GL_STENCIL_INDEX == base_format ||
- GL_DEPTH_STENCIL == base_format;
+ const bool is_integer = _mesa_is_format_integer_color(format);
+ const bool no_filtering = is_integer || (depth_format & process_flags);
ctx->TextureFormatSupported[format] =
brw_format_for_sampling(brw, sample_surface) &&
(brw_format_for_filter(brw, sample_surface) || no_filtering) &&
@@ -976,8 +973,8 @@ brw_init_surface_formats(struct brw_context *brw)
*/
brw->format_supported_as_render_target[format] =
brw_format_for_render(brw, render_surface) &&
- (brw_format_for_blend(brw, render_surface) || /* SINTs, UINTs, and YCRCB don't alpha blend. */
- no_filtering) &&
+ /* SINTs, UINTs, and YCRCB don't alpha blend. */
+ (brw_format_for_blend(brw, render_surface) || is_integer) &&
0 == (process_flags & render_not_supported_mask);
}
diff --git a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
index 7f4cac7c44..9dc7256fbf 100644
--- a/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
+++ b/src/mesa/drivers/dri/i965/gen7_wm_surface_state.c
@@ -307,8 +307,9 @@ gen7_update_texture_surface(struct gl_context *ctx,
sampler->sRGBDecode,
&process_flags, dst_format, src_format);
- if (for_gather && tex_format == BRW_SURFACEFORMAT_R32G32_FLOAT)
+ if (for_gather && tex_format == BRW_SURFACEFORMAT_R32G32_FLOAT && (depth_format & process_flags)) {
tex_format = BRW_SURFACEFORMAT_R32G32_FLOAT_LD;
+ }
surf[0] = translate_tex_target(tObj->Target) << BRW_SURFACE_TYPE_SHIFT |
tex_format << BRW_SURFACE_FORMAT_SHIFT |