diff options
| author | Rex Zhu <Rex.Zhu@amd.com> | 2017-06-02 20:04:40 +0800 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2017-06-06 17:00:42 -0400 |
| commit | d0856f3ad5af1e2487df97fa667307982c89b717 (patch) | |
| tree | c4af01c49fd381993fcafac7a024f7cf18517ae0 | |
| parent | b9509c80dfcd3452d645fbc702916d6e8ffb7a4d (diff) | |
drm/amd/powerplay: fix populate dpm level failed when s3 on vega10.
As the min clk may be large than boot level can support.
in this case, just ignore the min clk.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| -rw-r--r-- | drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c | 13 |
1 files changed, 6 insertions, 7 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c index 43812d2c8464..d2998fabe875 100644 --- a/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c +++ b/drivers/gpu/drm/amd/powerplay/hwmgr/vega10_hwmgr.c @@ -3119,11 +3119,10 @@ static int vega10_apply_state_adjust_rules(struct pp_hwmgr *hwmgr, vega10_ps->performance_levels[0].gfx_clock = sclk; vega10_ps->performance_levels[0].mem_clock = mclk; - vega10_ps->performance_levels[1].gfx_clock = - (vega10_ps->performance_levels[1].gfx_clock >= - vega10_ps->performance_levels[0].gfx_clock) ? - vega10_ps->performance_levels[1].gfx_clock : - vega10_ps->performance_levels[0].gfx_clock; + if (vega10_ps->performance_levels[1].gfx_clock < + vega10_ps->performance_levels[0].gfx_clock) + vega10_ps->performance_levels[0].gfx_clock = + vega10_ps->performance_levels[1].gfx_clock; if (disable_mclk_switching) { /* Set Mclk the max of level 0 and level 1 */ @@ -3146,8 +3145,8 @@ static int vega10_apply_state_adjust_rules(struct pp_hwmgr *hwmgr, } else { if (vega10_ps->performance_levels[1].mem_clock < vega10_ps->performance_levels[0].mem_clock) - vega10_ps->performance_levels[1].mem_clock = - vega10_ps->performance_levels[0].mem_clock; + vega10_ps->performance_levels[0].mem_clock = + vega10_ps->performance_levels[1].mem_clock; } if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, |