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authorSamuel Pitoiset <samuel.pitoiset@gmail.com>2024-04-04 13:13:09 +0200
committerMarge Bot <emma+marge@anholt.net>2024-04-04 21:57:46 +0000
commit5cc3258533140997a61d7ddc65e50fe5b50e8acf (patch)
treedd979660b32eaa1f7a724be644bdaf8e060cfe84
parent6a27c5e9a897b2bb0e14a6a83e31700abc9c8d11 (diff)
radv: replace radv_float_to_{u,s}fixed() by util_{un}signed_fixed()
Signed-off-by: Samuel Pitoiset <samuel.pitoiset@gmail.com> Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/28568>
-rw-r--r--src/amd/vulkan/radv_image_view.c4
-rw-r--r--src/amd/vulkan/radv_private.h12
-rw-r--r--src/amd/vulkan/radv_sampler.c8
3 files changed, 6 insertions, 18 deletions
diff --git a/src/amd/vulkan/radv_image_view.c b/src/amd/vulkan/radv_image_view.c
index f96cea4e922..dd88807da06 100644
--- a/src/amd/vulkan/radv_image_view.c
+++ b/src/amd/vulkan/radv_image_view.c
@@ -335,7 +335,7 @@ gfx10_make_texture_descriptor(struct radv_device *device, struct radv_image *ima
if (nbc_view && nbc_view->valid)
max_mip = nbc_view->num_levels - 1;
- unsigned min_lod_clamped = radv_float_to_ufixed(CLAMP(min_lod, 0, 15), 8);
+ unsigned min_lod_clamped = util_unsigned_fixed(CLAMP(min_lod, 0, 15), 8);
if (pdev->info.gfx_level >= GFX11) {
state[1] |= S_00A004_MAX_MIP(max_mip);
state[5] |= S_00A014_MIN_LOD_LO(min_lod_clamped);
@@ -475,7 +475,7 @@ gfx6_make_texture_descriptor(struct radv_device *device, struct radv_image *imag
depth = image->vk.array_layers / 6;
state[0] = 0;
- state[1] = (S_008F14_MIN_LOD(radv_float_to_ufixed(CLAMP(min_lod, 0, 15), 8)) | S_008F14_DATA_FORMAT(data_format) |
+ state[1] = (S_008F14_MIN_LOD(util_unsigned_fixed(CLAMP(min_lod, 0, 15), 8)) | S_008F14_DATA_FORMAT(data_format) |
S_008F14_NUM_FORMAT(num_format));
state[2] = (S_008F18_WIDTH(width - 1) | S_008F18_HEIGHT(height - 1) | S_008F18_PERF_MOD(4));
state[3] = (S_008F1C_DST_SEL_X(radv_map_swizzle(swizzle[0])) | S_008F1C_DST_SEL_Y(radv_map_swizzle(swizzle[1])) |
diff --git a/src/amd/vulkan/radv_private.h b/src/amd/vulkan/radv_private.h
index c715e47cdea..777f6c6ef6c 100644
--- a/src/amd/vulkan/radv_private.h
+++ b/src/amd/vulkan/radv_private.h
@@ -132,18 +132,6 @@ radv_is_aligned(uintmax_t n, uintmax_t a)
return (n & (a - 1)) == 0;
}
-static inline int
-radv_float_to_sfixed(float value, unsigned frac_bits)
-{
- return value * (1 << frac_bits);
-}
-
-static inline unsigned int
-radv_float_to_ufixed(float value, unsigned frac_bits)
-{
- return value * (1 << frac_bits);
-}
-
#ifdef __cplusplus
}
#endif
diff --git a/src/amd/vulkan/radv_sampler.c b/src/amd/vulkan/radv_sampler.c
index 7ca4fdac9d4..1f97dc0db3a 100644
--- a/src/amd/vulkan/radv_sampler.c
+++ b/src/amd/vulkan/radv_sampler.c
@@ -239,8 +239,8 @@ radv_init_sampler(struct radv_device *device, struct radv_sampler *sampler, cons
S_008F30_ANISO_THRESHOLD(max_aniso_ratio >> 1) | S_008F30_ANISO_BIAS(max_aniso_ratio) |
S_008F30_DISABLE_CUBE_WRAP(disable_cube_wrap) | S_008F30_COMPAT_MODE(compat_mode) |
S_008F30_FILTER_MODE(filter_mode) | S_008F30_TRUNC_COORD(trunc_coord));
- sampler->state[1] = (S_008F34_MIN_LOD(radv_float_to_ufixed(CLAMP(pCreateInfo->minLod, 0, 15), 8)) |
- S_008F34_MAX_LOD(radv_float_to_ufixed(CLAMP(pCreateInfo->maxLod, 0, 15), 8)) |
+ sampler->state[1] = (S_008F34_MIN_LOD(util_unsigned_fixed(CLAMP(pCreateInfo->minLod, 0, 15), 8)) |
+ S_008F34_MAX_LOD(util_unsigned_fixed(CLAMP(pCreateInfo->maxLod, 0, 15), 8)) |
S_008F34_PERF_MIP(max_aniso_ratio ? max_aniso_ratio + 6 : 0));
sampler->state[2] = (S_008F38_XY_MAG_FILTER(radv_tex_filter(pCreateInfo->magFilter, max_aniso)) |
S_008F38_XY_MIN_FILTER(radv_tex_filter(pCreateInfo->minFilter, max_aniso)) |
@@ -248,11 +248,11 @@ radv_init_sampler(struct radv_device *device, struct radv_sampler *sampler, cons
sampler->state[3] = S_008F3C_BORDER_COLOR_TYPE(radv_tex_bordercolor(border_color));
if (pdev->info.gfx_level >= GFX10) {
- sampler->state[2] |= S_008F38_LOD_BIAS(radv_float_to_sfixed(CLAMP(pCreateInfo->mipLodBias, -32, 31), 8)) |
+ sampler->state[2] |= S_008F38_LOD_BIAS(util_signed_fixed(CLAMP(pCreateInfo->mipLodBias, -32, 31), 8)) |
S_008F38_ANISO_OVERRIDE_GFX10(instance->drirc.disable_aniso_single_level);
} else {
sampler->state[2] |=
- S_008F38_LOD_BIAS(radv_float_to_sfixed(CLAMP(pCreateInfo->mipLodBias, -16, 16), 8)) |
+ S_008F38_LOD_BIAS(util_signed_fixed(CLAMP(pCreateInfo->mipLodBias, -16, 16), 8)) |
S_008F38_DISABLE_LSB_CEIL(pdev->info.gfx_level <= GFX8) | S_008F38_FILTER_PREC_FIX(1) |
S_008F38_ANISO_OVERRIDE_GFX8(instance->drirc.disable_aniso_single_level && pdev->info.gfx_level >= GFX8);
}